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| author | Richard Henderson <rth@twiddle.net> | 2016-11-16 15:34:03 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:47:48 -0800 |
| commit | 2a1d9d41aedd722d674b2a94d9b7dbea61469cac (patch) | |
| tree | e1c8d0b929fe013c6cf1c4eeef48f14389813c2f /tcg/mips/tcg-target.h | |
| parent | cc0fec8a4d2a8546fe236a09bfd80150af9cbe6b (diff) | |
| download | qemu-2a1d9d41aedd722d674b2a94d9b7dbea61469cac.zip qemu-2a1d9d41aedd722d674b2a94d9b7dbea61469cac.tar.gz qemu-2a1d9d41aedd722d674b2a94d9b7dbea61469cac.tar.bz2 | |
tcg/mips: Handle clz opcode
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/mips/tcg-target.h')
| -rw-r--r-- | tcg/mips/tcg-target.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 06988cf..a680f16 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -121,8 +121,6 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_rem_i32 1 #define TCG_TARGET_HAS_not_i32 1 #define TCG_TARGET_HAS_nor_i32 1 -#define TCG_TARGET_HAS_clz_i32 0 -#define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_andc_i32 0 #define TCG_TARGET_HAS_orc_i32 0 #define TCG_TARGET_HAS_eqv_i32 0 @@ -165,6 +163,8 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_ext8s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_ext16s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_rot_i32 use_mips32r2_instructions +#define TCG_TARGET_HAS_clz_i32 use_mips32r2_instructions +#define TCG_TARGET_HAS_ctz_i32 0 #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_movcond_i64 use_movnz_instructions @@ -177,6 +177,8 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_ext8s_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_ext16s_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_rot_i64 use_mips32r2_instructions +#define TCG_TARGET_HAS_clz_i64 use_mips32r2_instructions +#define TCG_TARGET_HAS_ctz_i64 0 #endif /* optional instructions automatically implemented */ |