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authorRichard Henderson <rth@twiddle.net>2015-05-12 11:51:44 -0700
committerRichard Henderson <rth@twiddle.net>2015-05-14 12:14:55 -0700
commit59227d5d45bb3c31dc2118011691c35b3c00879c (patch)
treebb7a884bf0fb334f9ab104c7051aca91d9e0e79a /tcg/ia64
parent1eeace9c237a729d11c7acd7c0338ab4562af637 (diff)
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tcg: Merge memop and mmu_idx parameters to qemu_ld/st
At the tcg opcode level, not at the tcg-op.h generator level. This requires minor changes through all of the tcg backends, but none of the cpu translators. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ia64')
-rw-r--r--tcg/ia64/tcg-target.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 25f207d..1920593 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -1634,14 +1634,16 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args)
OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1
};
int addr_reg, data_reg, mem_index;
+ TCGMemOpIdx oi;
TCGMemOp opc, s_bits;
uint64_t fin1, fin2;
tcg_insn_unit *label_ptr;
data_reg = args[0];
addr_reg = args[1];
- opc = args[2];
- mem_index = args[3];
+ oi = args[2];
+ opc = get_memop(oi);
+ mem_index = get_mmuidx(oi);
s_bits = opc & MO_SIZE;
/* Read the TLB entry */
@@ -1696,13 +1698,15 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
TCGReg addr_reg, data_reg;
int mem_index;
uint64_t pre1, pre2;
+ TCGMemOpIdx oi;
TCGMemOp opc, s_bits;
tcg_insn_unit *label_ptr;
data_reg = args[0];
addr_reg = args[1];
- opc = args[2];
- mem_index = args[3];
+ oi = args[2];
+ opc = get_memop(oi);
+ mem_index = get_mmuidx(oi);
s_bits = opc & MO_SIZE;
/* Note that we always use LE helper functions, so the bswap insns