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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 18:07:05 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:23:59 +0100
commit9ecf5f61b8f468f17483f325f565802c645983a5 (patch)
tree1e7d5ebf403a130c229e5c13d903da018069aac9 /tcg/i386
parent52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (diff)
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tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/i386')
-rw-r--r--tcg/i386/tcg-target.c.inc4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index f4ac877..7d63403 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1287,7 +1287,7 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg dest, TCGReg src)
tcg_out_modrm(s, OPC_MOVSWL + rexw, dest, src);
}
-static inline void tcg_out_ext32u(TCGContext *s, int dest, int src)
+static void tcg_out_ext32u(TCGContext *s, TCGReg dest, TCGReg src)
{
/* 32-bit mov zero extends. */
tcg_out_modrm(s, OPC_MOVL_GvEv, dest, src);
@@ -2754,7 +2754,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_bswap64(s, a0);
break;
case INDEX_op_extu_i32_i64:
- case INDEX_op_ext32u_i64:
case INDEX_op_extrl_i64_i32:
tcg_out_ext32u(s, a0, a1);
break;
@@ -2838,6 +2837,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext16u_i32:
case INDEX_op_ext16u_i64:
case INDEX_op_ext32s_i64:
+ case INDEX_op_ext32u_i64:
default:
g_assert_not_reached();
}