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| author | Richard Henderson <rth@twiddle.net> | 2010-06-03 17:35:17 -0700 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-06-10 00:16:21 +0200 |
| commit | 5d8a4f8f4aa5b63eb3cc2a2234ffb8d4f0a2af50 (patch) | |
| tree | eda84dcc0fa390a3d98b762105b6310f491af743 /tcg/i386/tcg-target.h | |
| parent | 1c0fd16018384daeb340b389a00768ceecc45611 (diff) | |
| download | qemu-5d8a4f8f4aa5b63eb3cc2a2234ffb8d4f0a2af50.zip qemu-5d8a4f8f4aa5b63eb3cc2a2234ffb8d4f0a2af50.tar.gz qemu-5d8a4f8f4aa5b63eb3cc2a2234ffb8d4f0a2af50.tar.bz2 | |
tcg-i386: Merge 64-bit generation.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/i386/tcg-target.h')
| -rw-r--r-- | tcg/i386/tcg-target.h | 61 |
1 files changed, 58 insertions, 3 deletions
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index ca1d730..bfafbfc 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -23,10 +23,18 @@ */ #define TCG_TARGET_I386 1 -#define TCG_TARGET_REG_BITS 32 +#if defined(__x86_64__) +# define TCG_TARGET_REG_BITS 64 +#else +# define TCG_TARGET_REG_BITS 32 +#endif //#define TCG_TARGET_WORDS_BIGENDIAN -#define TCG_TARGET_NB_REGS 8 +#if TCG_TARGET_REG_BITS == 64 +# define TCG_TARGET_NB_REGS 16 +#else +# define TCG_TARGET_NB_REGS 8 +#endif enum { TCG_REG_EAX = 0, @@ -37,8 +45,30 @@ enum { TCG_REG_EBP, TCG_REG_ESI, TCG_REG_EDI, + + /* 64-bit registers; always define the symbols to avoid + too much if-deffing. */ + TCG_REG_R8, + TCG_REG_R9, + TCG_REG_R10, + TCG_REG_R11, + TCG_REG_R12, + TCG_REG_R13, + TCG_REG_R14, + TCG_REG_R15, + TCG_REG_RAX = TCG_REG_EAX, + TCG_REG_RCX = TCG_REG_ECX, + TCG_REG_RDX = TCG_REG_EDX, + TCG_REG_RBX = TCG_REG_EBX, + TCG_REG_RSP = TCG_REG_ESP, + TCG_REG_RBP = TCG_REG_EBP, + TCG_REG_RSI = TCG_REG_ESI, + TCG_REG_RDI = TCG_REG_EDI, }; +#define TCG_CT_CONST_S32 0x100 +#define TCG_CT_CONST_U32 0x200 + /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_ESP #define TCG_TARGET_STACK_ALIGN 16 @@ -61,10 +91,35 @@ enum { // #define TCG_TARGET_HAS_nand_i32 // #define TCG_TARGET_HAS_nor_i32 +#if TCG_TARGET_REG_BITS == 64 +#define TCG_TARGET_HAS_div2_i64 +#define TCG_TARGET_HAS_rot_i64 +#define TCG_TARGET_HAS_ext8s_i64 +#define TCG_TARGET_HAS_ext16s_i64 +#define TCG_TARGET_HAS_ext32s_i64 +#define TCG_TARGET_HAS_ext8u_i64 +#define TCG_TARGET_HAS_ext16u_i64 +#define TCG_TARGET_HAS_ext32u_i64 +#define TCG_TARGET_HAS_bswap16_i64 +#define TCG_TARGET_HAS_bswap32_i64 +#define TCG_TARGET_HAS_bswap64_i64 +#define TCG_TARGET_HAS_neg_i64 +#define TCG_TARGET_HAS_not_i64 +// #define TCG_TARGET_HAS_andc_i64 +// #define TCG_TARGET_HAS_orc_i64 +// #define TCG_TARGET_HAS_eqv_i64 +// #define TCG_TARGET_HAS_nand_i64 +// #define TCG_TARGET_HAS_nor_i64 +#endif + #define TCG_TARGET_HAS_GUEST_BASE /* Note: must be synced with dyngen-exec.h */ -#define TCG_AREG0 TCG_REG_EBP +#if TCG_TARGET_REG_BITS == 64 +# define TCG_AREG0 TCG_REG_R14 +#else +# define TCG_AREG0 TCG_REG_EBP +#endif static inline void flush_icache_range(unsigned long start, unsigned long stop) { |