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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-06-13 16:27:13 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-29 10:04:57 -0700 |
| commit | 92ecfab50ee2b30e60c774f96f05fc38714874f1 (patch) | |
| tree | 07407b0c1a10d8abaa3c1ac8ccd90d3f27a30a23 /tcg/arm | |
| parent | b983a0e17240fcbc8e1a32ef44221a1954332c81 (diff) | |
| download | qemu-92ecfab50ee2b30e60c774f96f05fc38714874f1.zip qemu-92ecfab50ee2b30e60c774f96f05fc38714874f1.tar.gz qemu-92ecfab50ee2b30e60c774f96f05fc38714874f1.tar.bz2 | |
target/mips: Fix gen_mxu_s32ldd_s32lddr
There were two bugs here: (1) the required endianness was
not present in the MemOp, and (2) we were not providing a
zero-extended input to the bswap as semantics required.
The best fix is to fold the bswap into the memory operation,
producing the desired result directly.
Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
0 files changed, 0 insertions, 0 deletions