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author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-20 00:55:36 +1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-02-04 06:19:42 -1000 |
commit | 5e3d0c199f4edf4ecdf8100464da441c60ce36e3 (patch) | |
tree | 5158b2b91e0ffd80a66deae1f432ce6210db6b0f /tcg/arm | |
parent | 313bdea84d2912fdbb139e746bd9346b3d85ebdc (diff) | |
download | qemu-5e3d0c199f4edf4ecdf8100464da441c60ce36e3.zip qemu-5e3d0c199f4edf4ecdf8100464da441c60ce36e3.tar.gz qemu-5e3d0c199f4edf4ecdf8100464da441c60ce36e3.tar.bz2 |
tcg: Introduce tcg_target_call_oarg_reg
Replace the flat array tcg_target_call_oarg_regs[] with
a function call including the TCGCallReturnKind.
Extend the set of registers for ARM to r0-r3 to match the ABI:
https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r-- | tcg/arm/tcg-target.c.inc | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 6e9e9b9..d06ac60 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -79,9 +79,13 @@ static const int tcg_target_reg_alloc_order[] = { static const int tcg_target_call_iarg_regs[4] = { TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3 }; -static const int tcg_target_call_oarg_regs[2] = { - TCG_REG_R0, TCG_REG_R1 -}; + +static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) +{ + tcg_debug_assert(kind == TCG_CALL_RET_NORMAL); + tcg_debug_assert(slot >= 0 && slot <= 3); + return TCG_REG_R0 + slot; +} #define TCG_REG_TMP TCG_REG_R12 #define TCG_VEC_TMP TCG_REG_Q15 |