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| author | Richard Henderson <rth@twiddle.net> | 2013-04-23 08:38:50 -0700 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-04-27 02:16:45 +0200 |
| commit | 595b5397cc589d694ec3af660b21f483e8142f69 (patch) | |
| tree | c1d7d4bc31e6fb1b30cf653ffe368c6eb455bb24 /tcg/arm | |
| parent | 702b33b1d5f8fee7e5799af450375671264a9ebd (diff) | |
| download | qemu-595b5397cc589d694ec3af660b21f483e8142f69.zip qemu-595b5397cc589d694ec3af660b21f483e8142f69.tar.gz qemu-595b5397cc589d694ec3af660b21f483e8142f69.tar.bz2 | |
tcg-arm: Delete the 'S' constraint
After the previous patch, 's' and 'S' are the same.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/arm')
| -rw-r--r-- | tcg/arm/tcg-target.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 375c1e1..5fa3cb1 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -201,8 +201,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) /* qemu_st address & data_reg */ case 's': - /* qemu_st64 data_reg2 */ - case 'S': ct->ct |= TCG_CT_REG; tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1); /* r0-r2 will be overwritten when reading the tlb entry (softmmu only) @@ -1928,7 +1926,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_qemu_st8, { "s", "s" } }, { INDEX_op_qemu_st16, { "s", "s" } }, { INDEX_op_qemu_st32, { "s", "s" } }, - { INDEX_op_qemu_st64, { "S", "S", "s" } }, + { INDEX_op_qemu_st64, { "s", "s", "s" } }, #else { INDEX_op_qemu_ld8u, { "r", "l", "l" } }, { INDEX_op_qemu_ld8s, { "r", "l", "l" } }, @@ -1940,7 +1938,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_qemu_st8, { "s", "s", "s" } }, { INDEX_op_qemu_st16, { "s", "s", "s" } }, { INDEX_op_qemu_st32, { "s", "s", "s" } }, - { INDEX_op_qemu_st64, { "S", "S", "s", "s" } }, + { INDEX_op_qemu_st64, { "s", "s", "s", "s" } }, #endif { INDEX_op_bswap16_i32, { "r", "r" } }, |