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author | Richard Henderson <richard.henderson@linaro.org> | 2021-12-16 11:17:46 -0800 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2022-03-04 08:50:41 -1000 |
commit | ed5234735af0c9ddc120ba2297e47714c5126abd (patch) | |
tree | aa1d8992688099dc71ccc0f28a5b52f3e7a7c022 /tcg/arm | |
parent | 0166feda3257b5987be62566ad1f421c6527ba67 (diff) | |
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tcg: Add opcodes for vector nand, nor, eqv
We've had placeholders for these opcodes for a while,
and should have support on ppc, s390x and avx512 hosts.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r-- | tcg/arm/tcg-target.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 27c27a1..7e96495 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -130,6 +130,9 @@ extern bool use_neon_instructions; #define TCG_TARGET_HAS_andc_vec 1 #define TCG_TARGET_HAS_orc_vec 1 +#define TCG_TARGET_HAS_nand_vec 0 +#define TCG_TARGET_HAS_nor_vec 0 +#define TCG_TARGET_HAS_eqv_vec 0 #define TCG_TARGET_HAS_not_vec 1 #define TCG_TARGET_HAS_neg_vec 1 #define TCG_TARGET_HAS_abs_vec 1 |