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| author | Richard Henderson <rth@twiddle.net> | 2016-10-14 19:45:26 -0500 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 07:59:11 -0800 |
| commit | 40b2ccb156534f5d5f1d110a6ce008d87ee10af1 (patch) | |
| tree | 27470482b2259b4a3944cc045073450d2a770308 /tcg/arm/tcg-target.h | |
| parent | e2179f94a17bf0933df29ce1b4f6bc93cbe7dbd3 (diff) | |
| download | qemu-40b2ccb156534f5d5f1d110a6ce008d87ee10af1.zip qemu-40b2ccb156534f5d5f1d110a6ce008d87ee10af1.tar.gz qemu-40b2ccb156534f5d5f1d110a6ce008d87ee10af1.tar.bz2 | |
tcg/arm: Move isa detection to tcg-target.h
This allows us to use this detection within the TCG_TARGET_HAS_*
macros, instead of requiring a function call into tcg-target.inc.c.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/arm/tcg-target.h')
| -rw-r--r-- | tcg/arm/tcg-target.h | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 8e724be..d1fe12b 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -26,6 +26,37 @@ #ifndef ARM_TCG_TARGET_H #define ARM_TCG_TARGET_H +/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ +#ifndef __ARM_ARCH +# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ + || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ + || defined(__ARM_ARCH_7EM__) +# define __ARM_ARCH 7 +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ + || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) +# define __ARM_ARCH 6 +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ + || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ + || defined(__ARM_ARCH_5TEJ__) +# define __ARM_ARCH 5 +# else +# define __ARM_ARCH 4 +# endif +#endif + +extern int arm_arch; + +#if defined(__ARM_ARCH_5T__) \ + || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5TEJ__) +# define use_armv5t_instructions 1 +#else +# define use_armv5t_instructions use_armv6_instructions +#endif + +#define use_armv6_instructions (__ARM_ARCH >= 6 || arm_arch >= 6) +#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) + #undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 @@ -79,7 +110,7 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_eqv_i32 0 #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 -#define TCG_TARGET_HAS_deposit_i32 1 +#define TCG_TARGET_HAS_deposit_i32 use_armv7_instructions #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 @@ -90,9 +121,6 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_div_i32 use_idiv_instructions #define TCG_TARGET_HAS_rem_i32 0 -extern bool tcg_target_deposit_valid(int ofs, int len); -#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid - enum { TCG_AREG0 = TCG_REG_R6, }; |