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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 19:58:35 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:46:45 +0100
commitb8b94ac6753effcfda7880d3b9ac49b530e3d2ab (patch)
tree4a73521787d99cd7633d1356b674cbb5f12beaed /tcg/aarch64
parentb9bfe000f954e1defefb4c917f98bf82c337144b (diff)
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tcg: Split out tcg_out_extrl_i64_i32
We will need a backend interface for type truncation. For those backends that did not enable TCG_TARGET_HAS_extrl_i64_i32, use tcg_out_mov. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64')
-rw-r--r--tcg/aarch64/tcg-target.c.inc6
1 files changed, 6 insertions, 0 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index ca8b258..bd1fab1 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1467,6 +1467,11 @@ static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg rd, TCGReg rn)
tcg_out_ext32u(s, rd, rn);
}
+static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg rd, TCGReg rn)
+{
+ tcg_out_mov(s, TCG_TYPE_I32, rd, rn);
+}
+
static void tcg_out_addsubi(TCGContext *s, int ext, TCGReg rd,
TCGReg rn, int64_t aimm)
{
@@ -2337,6 +2342,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext32u_i64:
case INDEX_op_ext_i32_i64:
case INDEX_op_extu_i32_i64:
+ case INDEX_op_extrl_i64_i32:
default:
g_assert_not_reached();
}