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| author | Richard Henderson <rth@twiddle.net> | 2015-05-12 11:51:44 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-05-14 12:14:55 -0700 |
| commit | 59227d5d45bb3c31dc2118011691c35b3c00879c (patch) | |
| tree | bb7a884bf0fb334f9ab104c7051aca91d9e0e79a /tcg/aarch64 | |
| parent | 1eeace9c237a729d11c7acd7c0338ab4562af637 (diff) | |
| download | qemu-59227d5d45bb3c31dc2118011691c35b3c00879c.zip qemu-59227d5d45bb3c31dc2118011691c35b3c00879c.tar.gz qemu-59227d5d45bb3c31dc2118011691c35b3c00879c.tar.bz2 | |
tcg: Merge memop and mmu_idx parameters to qemu_ld/st
At the tcg opcode level, not at the tcg-op.h generator level.
This requires minor changes through all of the tcg backends,
but none of the cpu translators.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/aarch64')
| -rw-r--r-- | tcg/aarch64/tcg-target.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 87dc245..23b8fda 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -1197,9 +1197,11 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp memop, } static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, - TCGMemOp memop, TCGType ext, int mem_index) + TCGMemOpIdx oi, TCGType ext) { + TCGMemOp memop = get_memop(oi); #ifdef CONFIG_SOFTMMU + unsigned mem_index = get_mmuidx(oi); TCGMemOp s_bits = memop & MO_SIZE; tcg_insn_unit *label_ptr; @@ -1214,9 +1216,11 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, } static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, - TCGMemOp memop, int mem_index) + TCGMemOpIdx oi) { + TCGMemOp memop = get_memop(oi); #ifdef CONFIG_SOFTMMU + unsigned mem_index = get_mmuidx(oi); TCGMemOp s_bits = memop & MO_SIZE; tcg_insn_unit *label_ptr; @@ -1515,11 +1519,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_ld_i64: - tcg_out_qemu_ld(s, a0, a1, a2, ext, args[3]); + tcg_out_qemu_ld(s, a0, a1, a2, ext); break; case INDEX_op_qemu_st_i32: case INDEX_op_qemu_st_i64: - tcg_out_qemu_st(s, REG0(0), a1, a2, args[3]); + tcg_out_qemu_st(s, REG0(0), a1, a2); break; case INDEX_op_bswap64_i64: |