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author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 17:50:09 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:23:49 +0100 |
commit | 52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (patch) | |
tree | 24cfde0cbd7ce893b8b736cf42c92eaa0592148a /tcg/aarch64 | |
parent | 379afdff47556f01e75ce2caffd7ae9efa4f1214 (diff) | |
download | qemu-52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571.zip qemu-52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571.tar.gz qemu-52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571.tar.bz2 |
tcg: Split out tcg_out_ext32s
We will need a backend interface for performing 32-bit sign-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64')
-rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index f55829e..d796473 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1429,6 +1429,11 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rn) tcg_out_sxt(s, type, MO_16, rd, rn); } +static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rn) +{ + tcg_out_sxt(s, TCG_TYPE_I64, MO_32, rd, rn); +} + static inline void tcg_out_uxt(TCGContext *s, MemOp s_bits, TCGReg rd, TCGReg rn) { @@ -2232,7 +2237,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_bswap32_i64: tcg_out_rev(s, TCG_TYPE_I32, MO_32, a0, a1); if (a2 & TCG_BSWAP_OS) { - tcg_out_sxt(s, TCG_TYPE_I64, MO_32, a0, a0); + tcg_out_ext32s(s, a0, a0); } break; case INDEX_op_bswap32_i32: @@ -2251,7 +2256,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_ext_i32_i64: - case INDEX_op_ext32s_i64: tcg_out_sxt(s, TCG_TYPE_I64, MO_32, a0, a1); break; case INDEX_op_extu_i32_i64: @@ -2322,6 +2326,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext16s_i32: case INDEX_op_ext16u_i64: case INDEX_op_ext16u_i32: + case INDEX_op_ext32s_i64: default: g_assert_not_reached(); } |