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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-12-05 17:26:23 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-01-17 10:36:02 -1000 |
| commit | d59d83a1c38869b1e1a4f957eb939aaa8a342721 (patch) | |
| tree | d00d1b33561652736b040d92961a89653f32fa72 /tcg/aarch64/tcg-target.h | |
| parent | 2fd2e78d1b5281d589eabdf31a21166c80bebd80 (diff) | |
| download | qemu-d59d83a1c38869b1e1a4f957eb939aaa8a342721.zip qemu-d59d83a1c38869b1e1a4f957eb939aaa8a342721.tar.gz qemu-d59d83a1c38869b1e1a4f957eb939aaa8a342721.tar.bz2 | |
tcg/aarch64: Reorg goto_tb implementation
The old implementation replaces two insns, swapping between
b <dest>
nop
br x30
and
adrp x30, <dest>
addi x30, x30, lo12:<dest>
br x30
There is a race condition in which a thread could be stopped at
the PC of the second insn, and when restarted does not see the
complete address computation and branches to nowhere.
The new implemetation replaces only one insn, swapping between
b <dest>
br tmp
and
ldr tmp, <jmp_addr>
br tmp
Reported-by: hev <r@hev.cc>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.h')
| -rw-r--r-- | tcg/aarch64/tcg-target.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 6067446..8d24429 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -15,7 +15,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24 -#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) typedef enum { TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, |