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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-21 18:34:48 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-30 09:51:11 -0700 |
| commit | 929124ec0bdbfac11ae27378976e5799ca0d54cc (patch) | |
| tree | c51253db0a54f8de2ee2d012e2a7ae2850d5f898 /tcg/aarch64/tcg-target.h | |
| parent | 285a691fd2fe083c919c8ff06a8531ffc5cd7152 (diff) | |
| download | qemu-929124ec0bdbfac11ae27378976e5799ca0d54cc.zip qemu-929124ec0bdbfac11ae27378976e5799ca0d54cc.tar.gz qemu-929124ec0bdbfac11ae27378976e5799ca0d54cc.tar.bz2 | |
tcg/aarch64: Support 128-bit load/store
With FEAT_LSE2, LDP/STP suffices. Without FEAT_LSE2, use LDXP+STXP
16-byte atomicity is required and LDP/STP otherwise.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.h')
| -rw-r--r-- | tcg/aarch64/tcg-target.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index d5f7614..192a275 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -131,7 +131,16 @@ typedef enum { #define TCG_TARGET_HAS_muluh_i64 1 #define TCG_TARGET_HAS_mulsh_i64 1 -#define TCG_TARGET_HAS_qemu_ldst_i128 0 +/* + * Without FEAT_LSE2, we must use LDXP+STXP to implement atomic 128-bit load, + * which requires writable pages. We must defer to the helper for user-only, + * but in system mode all ram is writable for the host. + */ +#ifdef CONFIG_USER_ONLY +#define TCG_TARGET_HAS_qemu_ldst_i128 have_lse2 +#else +#define TCG_TARGET_HAS_qemu_ldst_i128 1 +#endif #define TCG_TARGET_HAS_v64 1 #define TCG_TARGET_HAS_v128 1 |