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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-04-20 13:31:06 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-05-10 13:24:09 +0100 |
| commit | eb849d8fd542329b299be5a894d7e272eed16a49 (patch) | |
| tree | be2abf0b04f243393cd5ae2232cef6034d1cabce /target | |
| parent | 68948d18224b93361e2880e2946ab268d0c650d7 (diff) | |
| download | qemu-eb849d8fd542329b299be5a894d7e272eed16a49.zip qemu-eb849d8fd542329b299be5a894d7e272eed16a49.tar.gz qemu-eb849d8fd542329b299be5a894d7e272eed16a49.tar.bz2 | |
target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()
In tlbi_aa64_vae2is_write() the calculation
bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2,
pageaddr)
has the two arms of the ?: expression reversed. Fix the bug.
Fixes: b6ad6062f1e5
Reported-by: Rebecca Cran <rebecca@nuviainc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Rebecca Cran <rebecca@nuviainc.com>
Message-id: 20210420123106.10861-1-peter.maydell@linaro.org
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 9b1b987..3b365a7 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4742,7 +4742,7 @@ static void tlbi_aa64_vae2is_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t pageaddr = sextract64(value << 12, 0, 56); bool secure = arm_is_secure_below_el3(env); int mask = secure ? ARMMMUIdxBit_SE2 : ARMMMUIdxBit_E2; - int bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2, + int bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_SE2 : ARMMMUIdx_E2, pageaddr); tlb_flush_page_bits_by_mmuidx_all_cpus_synced(cs, pageaddr, mask, bits); |