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| author | Robert Hoo <robert.hu@linux.intel.com> | 2018-07-05 17:09:56 +0800 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2018-08-16 13:43:01 -0300 |
| commit | 5131dc433df54b37e8e918d8fba7fe10344e7a7b (patch) | |
| tree | ae1cc92e6b0312a7e9622e6add1042df0e6b57cd /target | |
| parent | 3fc7c73139d2d38ae80c3b0bc963b1ac1555924c (diff) | |
| download | qemu-5131dc433df54b37e8e918d8fba7fe10344e7a7b.zip qemu-5131dc433df54b37e8e918d8fba7fe10344e7a7b.tar.gz qemu-5131dc433df54b37e8e918d8fba7fe10344e7a7b.tar.bz2 | |
i386: Add CPUID bit for PCONFIG
PCONFIG: Platform configuration, enumerated by CPUID.(EAX=07H, ECX=0):
EDX[bit18].
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
Message-Id: <1530781798-183214-4-git-send-email-robert.hu@linux.intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/cpu.c | 2 | ||||
| -rw-r--r-- | target/i386/cpu.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2bf9fcc..3e25773 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -997,7 +997,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "pconfig", NULL, NULL, NULL, NULL, NULL, NULL, NULL, "spec-ctrl", NULL, NULL, "arch-capabilities", NULL, "ssbd", diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8784447..4a95c63 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -689,6 +689,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */ #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */ +#define CPUID_7_0_EDX_PCONFIG (1U << 18) /* Platform Configuration */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */ |