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author | Richard Henderson <richard.henderson@linaro.org> | 2024-03-27 13:04:00 -1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2024-05-15 10:03:44 +0200 |
commit | 081a0ed188d8d9d9038f00337d331d185a7ae331 (patch) | |
tree | 0e55bea4b34e6f7720be40126493d57b96b1add5 /target | |
parent | 9dfcd2434989bb09b1ca11258180d9095c1d7ba8 (diff) | |
download | qemu-081a0ed188d8d9d9038f00337d331d185a7ae331.zip qemu-081a0ed188d8d9d9038f00337d331d185a7ae331.tar.gz qemu-081a0ed188d8d9d9038f00337d331d185a7ae331.tar.bz2 |
target/hppa: Do not mask in copy_iaoq_entry
As with loads and stores, code offsets are kept intact until the
full gva is formed. In qemu, this is in cpu_get_tb_cpu_state.
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/hppa/translate.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 70df42f..ab8dd16 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -637,15 +637,10 @@ static DisasIAQE iaqe_next_absv(DisasContext *ctx, TCGv_i64 var) static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest, const DisasIAQE *src) { - uint64_t mask = gva_offset_mask(ctx->tb_flags); - if (src->base == NULL) { - tcg_gen_movi_i64(dest, (ctx->iaoq_first + src->disp) & mask); - } else if (src->disp == 0) { - tcg_gen_andi_i64(dest, src->base, mask); + tcg_gen_movi_i64(dest, ctx->iaoq_first + src->disp); } else { tcg_gen_addi_i64(dest, src->base, src->disp); - tcg_gen_andi_i64(dest, dest, mask); } } |