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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-04-30 14:27:33 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-05-10 13:24:09 +0100 |
| commit | 06085d6a10e11fb9df871648668b072905936566 (patch) | |
| tree | 9be1aa7ef3410c355eec1e0d55fc1efcc5e24948 /target | |
| parent | 73d2f5d2bbbfbe1be6930ae388f92946e913dcc9 (diff) | |
| download | qemu-06085d6a10e11fb9df871648668b072905936566.zip qemu-06085d6a10e11fb9df871648668b072905936566.tar.gz qemu-06085d6a10e11fb9df871648668b072905936566.tar.bz2 | |
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210430132740.10391-7-peter.maydell@linaro.org
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate-vfp.c.inc | 20 | ||||
| -rw-r--r-- | target/arm/translate.c | 20 |
2 files changed, 20 insertions, 20 deletions
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc index 500492f..1004d1f 100644 --- a/target/arm/translate-vfp.c.inc +++ b/target/arm/translate-vfp.c.inc @@ -30,6 +30,26 @@ #include "decode-vfp.c.inc" #include "decode-vfp-uncond.c.inc" +static inline void vfp_load_reg64(TCGv_i64 var, int reg) +{ + tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg)); +} + +static inline void vfp_store_reg64(TCGv_i64 var, int reg) +{ + tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg)); +} + +static inline void vfp_load_reg32(TCGv_i32 var, int reg) +{ + tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg)); +} + +static inline void vfp_store_reg32(TCGv_i32 var, int reg) +{ + tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg)); +} + /* * The imm8 encodes the sign bit, enough bits to represent an exponent in * the range 01....1xx to 10....0xx, and the most significant 4 bits of diff --git a/target/arm/translate.c b/target/arm/translate.c index 5113cd2..c8b9ced 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1144,26 +1144,6 @@ static long vfp_reg_offset(bool dp, unsigned reg) } } -static inline void vfp_load_reg64(TCGv_i64 var, int reg) -{ - tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg)); -} - -static inline void vfp_store_reg64(TCGv_i64 var, int reg) -{ - tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg)); -} - -static inline void vfp_load_reg32(TCGv_i32 var, int reg) -{ - tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg)); -} - -static inline void vfp_store_reg32(TCGv_i32 var, int reg) -{ - tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg)); -} - void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop) { long off = neon_element_offset(reg, ele, memop); |