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author | Richard Henderson <richard.henderson@linaro.org> | 2019-08-15 09:46:42 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2019-08-16 14:02:49 +0100 |
commit | 331b1ca616cb708db30dab68e3262d286e687f24 (patch) | |
tree | d221b2852239ce1c66d8f2a80e90c328910646ba /target | |
parent | 8bd587c1066f4456ddfe611b571d9439a947d74c (diff) | |
download | qemu-331b1ca616cb708db30dab68e3262d286e687f24.zip qemu-331b1ca616cb708db30dab68e3262d286e687f24.tar.gz qemu-331b1ca616cb708db30dab68e3262d286e687f24.tar.bz2 |
target/arm: Pass in pc to thumb_insn_is_16bit
This function is used in two different contexts, and it will be
clearer if the function is given the address to which it applies.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190807045335.1361-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/translate.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index b32508c..de941e6 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9246,11 +9246,11 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) } } -static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn) +static bool thumb_insn_is_16bit(DisasContext *s, uint32_t pc, uint32_t insn) { - /* Return true if this is a 16 bit instruction. We must be precise - * about this (matching the decode). We assume that s->pc still - * points to the first 16 bits of the insn. + /* + * Return true if this is a 16 bit instruction. We must be precise + * about this (matching the decode). */ if ((insn >> 11) < 0x1d) { /* Definitely a 16-bit instruction */ @@ -9270,7 +9270,7 @@ static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn) return false; } - if ((insn >> 11) == 0x1e && s->pc - s->page_start < TARGET_PAGE_SIZE - 3) { + if ((insn >> 11) == 0x1e && pc - s->page_start < TARGET_PAGE_SIZE - 3) { /* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix * is not on the next page; we merge this into a 32-bit * insn. @@ -11809,7 +11809,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s) */ uint16_t insn = arm_lduw_code(env, s->pc, s->sctlr_b); - return !thumb_insn_is_16bit(s, insn); + return !thumb_insn_is_16bit(s, s->pc, insn); } static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) @@ -12108,7 +12108,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) } insn = arm_lduw_code(env, dc->pc, dc->sctlr_b); - is_16bit = thumb_insn_is_16bit(dc, insn); + is_16bit = thumb_insn_is_16bit(dc, dc->pc, insn); dc->pc += 2; if (!is_16bit) { uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b); |