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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-02-02 13:04:31 +0100
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-02-08 09:59:38 +0100
commitd8b33554d8dd9ee6348839d9e4d6f93adf45eff1 (patch)
tree3c28a97281cc04142ac57b03cbc8c80ec9627b24 /target
parent7ebe4cb36433af7aaaf621e851784f89b8cc5cb8 (diff)
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target/tricore: Fix OPC2_32_BO_LD_BU_PREINC
we were sign extending the result of the load, while the instruction clearly states that the result should be unsigned. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-10-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target')
-rw-r--r--target/tricore/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 8bf78b4..ab386ce 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -4964,7 +4964,7 @@ static void decode_bo_addrmode_ld_post_pre_base(DisasContext *ctx)
tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
break;
case OPC2_32_BO_LD_BU_PREINC:
- gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_SB);
+ gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB);
break;
case OPC2_32_BO_LD_D_SHORTOFF:
CHECK_REG_PAIR(r1);