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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-13 17:11:46 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-25 10:48:48 +0100 |
| commit | 9dacf0764b506a67f33dd63bdf48fc273c0bdb7f (patch) | |
| tree | 2f20f1176e3bc0853a3cccd4fb70920e73664248 /target | |
| parent | d42685765653ec155fdf60910662f8830bdb2cef (diff) | |
| download | qemu-9dacf0764b506a67f33dd63bdf48fc273c0bdb7f.zip qemu-9dacf0764b506a67f33dd63bdf48fc273c0bdb7f.tar.gz qemu-9dacf0764b506a67f33dd63bdf48fc273c0bdb7f.tar.bz2 | |
target/arm: Note that we handle VMOVL as a special case of VSHLL
Although the architecture doesn't define it as an alias, VMOVL
(vector move long) is encoded as a VSHLL with a zero shift.
Add a comment in the decode file noting that we handle VMOVL
as part of VSHLL.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/mve.decode | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/mve.decode b/target/arm/mve.decode index 595d975..fa9d921 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -364,6 +364,8 @@ VRSHRI_U 111 1 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_h VRSHRI_U 111 1 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_w # VSHLL T1 encoding; the T2 VSHLL encoding is elsewhere in this file +# Note that VMOVL is encoded as "VSHLL with a zero shift count"; we +# implement it that way rather than special-casing it in the decode. VSHLL_BS 111 0 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_b VSHLL_BS 111 0 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_h |