Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2023-11-16

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* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (27 commits)
  util/range.c: spelling fix: inbetween
  util/filemonitor-inotify.c: spelling fix: kenel
  tests/qtest/ufs-test.c: spelling fix: tranfer
  tests/qtest/migration-test.c: spelling fix: bandwith
  target/riscv/cpu.h: spelling fix: separatly
  include/hw/virtio/vhost.h: spelling fix: sate
  include/hw/hyperv/dynmem-proto.h: spelling fix: nunber, atleast
  include/block/ufs.h: spelling fix: setted
  hw/net/cadence_gem.c: spelling fixes: Octects
  hw/mem/memory-device.c: spelling fix: ontaining
  contrib/vhost-user-gpu/virgl.c: spelling fix: mesage
  migration/rdma.c: spelling fix: asume
  target/hppa: spelling fixes: Indicies, Truely
  target/arm/tcg: spelling fixes: alse, addreses
  docs/system/arm/emulation.rst: spelling fix: Enhacements
  docs/devel/migration.rst: spelling fixes: doen't, diferent, responsability, recomend
  docs/about/deprecated.rst: spelling fix: becase
  gdbstub: spelling fix: respectivelly
  hw/cxl: spelling fixes: limitaions, potentialy, intialized
  linux-user: spelling fixes: othe, necesary
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

5 files changed, 6 insertions, 6 deletions

diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
index ce4800b..8ad8462 100644
--- a/target/arm/tcg/helper-a64.c
+++ b/target/arm/tcg/helper-a64.c
@@ -1414,7 +1414,7 @@ void HELPER(setge)(CPUARMState *env, uint32_t syndrome, uint32_t mtedesc)
 /*
  * Perform part of a memory copy from the guest memory at fromaddr
  * and extending for copysize bytes, to the guest memory at
- * toaddr. Both addreses are dirty.
+ * toaddr. Both addresses are dirty.
  *
  * Returns the number of bytes actually set, which might be less than
  * copysize; the caller should loop until the whole copy has been done.
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index 3d7fdce..a6ebd75 100644
--- a/target/arm/tcg/hflags.c
+++ b/target/arm/tcg/hflags.c
@@ -327,7 +327,7 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
             DP_TBFLAG_A64(flags, MTE0_ACTIVE, 1);
         }
         /*
-         * For unpriv tag-setting accesses we alse need ATA0. Again, in
+         * For unpriv tag-setting accesses we also need ATA0. Again, in
          * contexts where unpriv and normal insns are the same we
          * duplicate the ATA bit to save effort for translate-a64.c.
          */
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index bcfed04..8be45c6 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -56,7 +56,7 @@
          1 << MMU_PL2_IDX    | 1 << MMU_PL2_P_IDX    |  \
          1 << MMU_USER_IDX   | 1 << MMU_USER_P_IDX)
 
-/* Indicies to flush for access_id changes. */
+/* Indices to flush for access_id changes. */
 #define HPPA_MMU_FLUSH_P_MASK \
         (1 << MMU_KERNEL_P_IDX | 1 << MMU_PL1_P_IDX  |  \
          1 << MMU_PL2_P_IDX    | 1 << MMU_USER_P_IDX)
diff --git a/target/hppa/machine.c b/target/hppa/machine.c
index 2f8e8cc..15cbc5e 100644
--- a/target/hppa/machine.c
+++ b/target/hppa/machine.c
@@ -129,7 +129,7 @@ static int tlb_post_load(void *opaque, int version_id)
 
     /*
      * Re-create the interval tree from the valid entries.
-     * Truely invalid entries should have start == end == 0.
+     * Truly invalid entries should have start == end == 0.
      * Otherwise it should be the in-flight tlb_partial entry.
      */
     for (uint32_t i = 0; i < ARRAY_SIZE(env->tlb); ++i) {
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index bf58b0f..d74b361 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -214,13 +214,13 @@ struct CPUArchState {
 
     /*
      * When mideleg[i]=0 and mvien[i]=1, sie[i] is no more
-     * alias of mie[i] and needs to be maintained separatly.
+     * alias of mie[i] and needs to be maintained separately.
      */
     uint64_t sie;
 
     /*
      * When hideleg[i]=0 and hvien[i]=1, vsie[i] is no more
-     * alias of sie[i] (mie[i]) and needs to be maintained separatly.
+     * alias of sie[i] (mie[i]) and needs to be maintained separately.
      */
     uint64_t vsie;