aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2019-06-11 16:39:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-06-13 15:14:05 +0100
commit8fec9a119264b7936503abce3c106fad7e3ccb76 (patch)
tree27066ed62970e82a05fe26b2467104901e292a08 /target
parentce28b303716e7eca3f3765bf6776d722ebbe1122 (diff)
downloadqemu-8fec9a119264b7936503abce3c106fad7e3ccb76.zip
qemu-8fec9a119264b7936503abce3c106fad7e3ccb76.tar.gz
qemu-8fec9a119264b7936503abce3c106fad7e3ccb76.tar.bz2
target/arm: Convert VSUB to decodetree
Convert the VSUB instruction to decodetree. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/translate-vfp.inc.c10
-rw-r--r--target/arm/translate.c6
-rw-r--r--target/arm/vfp.decode5
3 files changed, 16 insertions, 5 deletions
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
index 14aeb25..12da3b8 100644
--- a/target/arm/translate-vfp.inc.c
+++ b/target/arm/translate-vfp.inc.c
@@ -1461,3 +1461,13 @@ static bool trans_VADD_dp(DisasContext *s, arg_VADD_sp *a)
{
return do_vfp_3op_dp(s, gen_helper_vfp_addd, a->vd, a->vn, a->vm, false);
}
+
+static bool trans_VSUB_sp(DisasContext *s, arg_VSUB_sp *a)
+{
+ return do_vfp_3op_sp(s, gen_helper_vfp_subs, a->vd, a->vn, a->vm, false);
+}
+
+static bool trans_VSUB_dp(DisasContext *s, arg_VSUB_sp *a)
+{
+ return do_vfp_3op_dp(s, gen_helper_vfp_subd, a->vd, a->vn, a->vm, false);
+}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 6106590..664e3b5 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1386,7 +1386,6 @@ static inline void gen_vfp_##name(int dp) \
tcg_temp_free_ptr(fpst); \
}
-VFP_OP2(sub)
VFP_OP2(div)
#undef VFP_OP2
@@ -3110,7 +3109,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
rn = VFP_SREG_N(insn);
switch (op) {
- case 0 ... 6:
+ case 0 ... 7:
/* Already handled by decodetree */
return 1;
default:
@@ -3296,9 +3295,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
for (;;) {
/* Perform the calculation. */
switch (op) {
- case 7: /* sub: fn - fm */
- gen_vfp_sub(dp);
- break;
case 8: /* div: fn / fm */
gen_vfp_div(dp);
break;
diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode
index d911f12..de56f44 100644
--- a/target/arm/vfp.decode
+++ b/target/arm/vfp.decode
@@ -132,3 +132,8 @@ VADD_sp ---- 1110 0.11 .... .... 1010 .0.0 .... \
vm=%vm_sp vn=%vn_sp vd=%vd_sp
VADD_dp ---- 1110 0.11 .... .... 1011 .0.0 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp
+
+VSUB_sp ---- 1110 0.11 .... .... 1010 .1.0 .... \
+ vm=%vm_sp vn=%vn_sp vd=%vd_sp
+VSUB_dp ---- 1110 0.11 .... .... 1011 .1.0 .... \
+ vm=%vm_dp vn=%vn_dp vd=%vd_dp