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| author | Song Gao <gaosong@loongson.cn> | 2022-11-01 14:53:31 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2022-11-04 17:09:50 +0800 |
| commit | 8752b1306002237c39b3f849ca564c9db55c8b1f (patch) | |
| tree | 762cbe102ac173040bc2f03e5ed9b7b94cf85b35 /target | |
| parent | a6b129c8102668717370ec27490523fb1290ae5d (diff) | |
| download | qemu-8752b1306002237c39b3f849ca564c9db55c8b1f.zip qemu-8752b1306002237c39b3f849ca564c9db55c8b1f.tar.gz qemu-8752b1306002237c39b3f849ca564c9db55c8b1f.tar.bz2 | |
target/loongarch: Fix raise_mmu_exception() set wrong exception_index
When the address is invalid address, We should set exception_index
according to MMUAccessType, and EXCCODE_ADEF need't update badinstr.
Otherwise, The system enters an infinite loop. e.g:
run test.c on system mode
test.c:
#include<stdio.h>
void (*func)(int *);
int main()
{
int i = 8;
void *ptr = (void *)0x4000000000000000;
func = ptr;
func(&i);
return 0;
}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20221101073210.3934280-2-gaosong@loongson.cn>
Diffstat (limited to 'target')
| -rw-r--r-- | target/loongarch/cpu.c | 1 | ||||
| -rw-r--r-- | target/loongarch/tlb_helper.c | 5 |
2 files changed, 4 insertions, 2 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index b28aaed..1512664 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -177,6 +177,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) } QEMU_FALLTHROUGH; case EXCCODE_PIF: + case EXCCODE_ADEF: cause = cs->exception_index; update_badinstr = 0; break; diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c index 610b6d1..d2f8fb0 100644 --- a/target/loongarch/tlb_helper.c +++ b/target/loongarch/tlb_helper.c @@ -229,7 +229,8 @@ static void raise_mmu_exception(CPULoongArchState *env, target_ulong address, switch (tlb_error) { default: case TLBRET_BADADDR: - cs->exception_index = EXCCODE_ADEM; + cs->exception_index = access_type == MMU_INST_FETCH + ? EXCCODE_ADEF : EXCCODE_ADEM; break; case TLBRET_NOMATCH: /* No TLB match for a mapped address */ @@ -643,7 +644,7 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPULoongArchState *env = &cpu->env; hwaddr physical; int prot; - int ret = TLBRET_BADADDR; + int ret; /* Data access */ ret = get_physical_address(env, &physical, &prot, address, |