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authorAleksandar Markovic <amarkovic@wavecomp.com>2019-02-11 17:09:29 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-02-14 17:47:28 +0100
commit0454728c2283097cfa3e4e26d459725fa2c67f10 (patch)
tree87eeb2f2c0497e705391fd4c2c0f39b95175ae1c /target
parentf5117fd28552fe3fe32ef0495582b1caaef7a28d (diff)
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target/mips: introduce MTTCG-enabled builds
Introduce MTTCG-enabled QEMU builds for mips32, mipsn32, and mips64. Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/mips/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index eccee37..a10eeb0 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -11,6 +11,8 @@
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
+#define TCG_GUEST_DEFAULT_MO (0)
+
struct CPUMIPSState;
typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;