diff options
| author | David Hildenbrand <david@redhat.com> | 2019-03-07 13:15:24 +0100 |
|---|---|---|
| committer | Cornelia Huck <cohuck@redhat.com> | 2019-03-11 09:31:01 +0100 |
| commit | f6c7ff67574d1dd7266e6a0e16db5e891b3a4444 (patch) | |
| tree | 64036c47dbde55f303220fed5a9053be38cf03a2 /target | |
| parent | 76dbd28935273e5367e2701d82e636bf22fe85af (diff) | |
| download | qemu-f6c7ff67574d1dd7266e6a0e16db5e891b3a4444.zip qemu-f6c7ff67574d1dd7266e6a0e16db5e891b3a4444.tar.gz qemu-f6c7ff67574d1dd7266e6a0e16db5e891b3a4444.tar.bz2 | |
s390x/tcg: Implement VECTOR LOAD WITH LENGTH
We can reuse the helper introduced along with VECTOR LOAD TO BLOCK
BOUNDARY. We just have to take care of converting the highest index into
a length.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-18-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/s390x/insn-data.def | 2 | ||||
| -rw-r--r-- | target/s390x/translate.c | 7 | ||||
| -rw-r--r-- | target/s390x/translate_vx.inc.c | 13 |
3 files changed, 22 insertions, 0 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index bdd66758..3c0b14b 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1008,6 +1008,8 @@ F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC) /* VECTOR LOAD VR FROM GRS DISJOINT */ F(0xe762, VLVGP, VRR_f, V, r2, r3, 0, 0, vlvgp, 0, IF_VEC) +/* VECTOR LOAD WITH LENGTH */ + F(0xe737, VLL, VRS_b, V, la2, r3_32u, 0, 0, vll, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 588fc21..0afa8f7 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -5794,6 +5794,13 @@ static void in2_r3_sr32(DisasContext *s, DisasFields *f, DisasOps *o) } #define SPEC_in2_r3_sr32 0 +static void in2_r3_32u(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = tcg_temp_new_i64(); + tcg_gen_ext32u_i64(o->in2, regs[get_field(f, r3)]); +} +#define SPEC_in2_r3_32u 0 + static void in2_r2_32s(DisasContext *s, DisasFields *f, DisasOps *o) { o->in2 = tcg_temp_new_i64(); diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index abd33a9..b8e6985 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -519,3 +519,16 @@ static DisasJumpType op_vlvgp(DisasContext *s, DisasOps *o) write_vec_element_i64(o->in2, get_field(s->fields, v1), 1, ES_64); return DISAS_NEXT; } + +static DisasJumpType op_vll(DisasContext *s, DisasOps *o) +{ + const int v1_offs = vec_full_reg_offset(get_field(s->fields, v1)); + TCGv_ptr a0 = tcg_temp_new_ptr(); + + /* convert highest index into an actual length */ + tcg_gen_addi_i64(o->in2, o->in2, 1); + tcg_gen_addi_ptr(a0, cpu_env, v1_offs); + gen_helper_vll(cpu_env, a0, o->addr1, o->in2); + tcg_temp_free_ptr(a0); + return DISAS_NEXT; +} |