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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-02-26 17:55:31 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-03-05 13:46:26 -0800 |
| commit | bdbc87e323ee417735141ed2b11dab0091b57593 (patch) | |
| tree | 77eb1d1f49fbec1a0054232e2c8b6f856c99053c /target | |
| parent | 2f668fabbc09f9fcf6c93b17c077a078130e057a (diff) | |
| download | qemu-bdbc87e323ee417735141ed2b11dab0091b57593.zip qemu-bdbc87e323ee417735141ed2b11dab0091b57593.tar.gz qemu-bdbc87e323ee417735141ed2b11dab0091b57593.tar.bz2 | |
target/s390x: Split out gen_ri2
Use tcg_constant_i64. Adjust in2_mri2_* to allocate a new
temporary for the output, using gen_ri2 for the address.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/s390x/tcg/translate.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 811049e..21a57d5 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -5886,9 +5886,14 @@ static void in2_a2(DisasContext *s, DisasOps *o) } #define SPEC_in2_a2 0 +static TCGv gen_ri2(DisasContext *s) +{ + return tcg_constant_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2); +} + static void in2_ri2(DisasContext *s, DisasOps *o) { - o->in2 = tcg_const_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2); + o->in2 = gen_ri2(s); } #define SPEC_in2_ri2 0 @@ -5976,29 +5981,29 @@ static void in2_m2_64a(DisasContext *s, DisasOps *o) static void in2_mri2_16u(DisasContext *s, DisasOps *o) { - in2_ri2(s, o); - tcg_gen_qemu_ld16u(o->in2, o->in2, get_mem_index(s)); + o->in2 = tcg_temp_new_i64(); + tcg_gen_qemu_ld16u(o->in2, gen_ri2(s), get_mem_index(s)); } #define SPEC_in2_mri2_16u 0 static void in2_mri2_32s(DisasContext *s, DisasOps *o) { - in2_ri2(s, o); - tcg_gen_qemu_ld32s(o->in2, o->in2, get_mem_index(s)); + o->in2 = tcg_temp_new_i64(); + tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s)); } #define SPEC_in2_mri2_32s 0 static void in2_mri2_32u(DisasContext *s, DisasOps *o) { - in2_ri2(s, o); - tcg_gen_qemu_ld32u(o->in2, o->in2, get_mem_index(s)); + o->in2 = tcg_temp_new_i64(); + tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s)); } #define SPEC_in2_mri2_32u 0 static void in2_mri2_64(DisasContext *s, DisasOps *o) { - in2_ri2(s, o); - tcg_gen_qemu_ld64(o->in2, o->in2, get_mem_index(s)); + o->in2 = tcg_temp_new_i64(); + tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s)); } #define SPEC_in2_mri2_64 0 |