diff options
| author | Richard Henderson <rth@twiddle.net> | 2017-05-24 11:56:15 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-06-06 14:34:31 -0700 |
| commit | a72da8b7f555d640d79e41b131c1cd3169811861 (patch) | |
| tree | 9319fff312871f26a4db32cbda3b7c8517309668 /target | |
| parent | 8350079329562e93d109607d03393153de582d4a (diff) | |
| download | qemu-a72da8b7f555d640d79e41b131c1cd3169811861.zip qemu-a72da8b7f555d640d79e41b131c1cd3169811861.tar.gz qemu-a72da8b7f555d640d79e41b131c1cd3169811861.tar.bz2 | |
target/s390x: Fix EXECUTE with R1==0
The PoO specifies that when R1==0, no ORing into the insn
loaded from storage takes place. Load a zero for this case.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/s390x/insn-data.def | 4 | ||||
| -rw-r--r-- | target/s390x/translate.c | 14 |
2 files changed, 15 insertions, 3 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index cac0f51..3c3541c 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -327,9 +327,9 @@ C(0xeb57, XIY, SIY, LD, m1_8u, i2_8u, new, m1_8, xor, nz64) /* EXECUTE */ - C(0x4400, EX, RX_a, Z, r1_o, a2, 0, 0, ex, 0) + C(0x4400, EX, RX_a, Z, 0, a2, 0, 0, ex, 0) /* EXECUTE RELATIVE LONG */ - C(0xc600, EXRL, RIL_b, EE, r1_o, ri2, 0, 0, ex, 0) + C(0xc600, EXRL, RIL_b, EE, 0, ri2, 0, 0, ex, 0) /* EXTRACT ACCESS */ C(0xb24f, EAR, RRE, Z, 0, 0, new, r1_32, ear, 0) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index c1162a1..78c14ef 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2164,15 +2164,27 @@ static ExitStatus op_ex(DisasContext *s, DisasOps *o) MVC inside of memcpy, which needs a helper call anyway. So perhaps this doesn't bear thinking about any further. */ + int r1 = get_field(s->fields, r1); TCGv_i32 ilen; + TCGv_i64 v1; update_psw_addr(s); gen_op_calc_cc(s); + if (r1 == 0) { + v1 = tcg_const_i64(0); + } else { + v1 = regs[r1]; + } + ilen = tcg_const_i32(s->next_pc - s->pc); - gen_helper_ex(cpu_env, ilen, o->in1, o->in2); + gen_helper_ex(cpu_env, ilen, v1, o->in2); tcg_temp_free_i32(ilen); + if (r1 == 0) { + tcg_temp_free_i64(v1); + } + return NO_EXIT; } |