diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-04-20 20:07:38 +0200 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-02 16:49:34 +0200 |
commit | 905bdf72a6373bcb46fbdc8b9d7d9f83d134a266 (patch) | |
tree | 0c9241f34749529e15b1b3ab8e87e8f1434f396d /target | |
parent | df44e81703968d22ce59e1160f970c5e70db2cfb (diff) | |
download | qemu-905bdf72a6373bcb46fbdc8b9d7d9f83d134a266.zip qemu-905bdf72a6373bcb46fbdc8b9d7d9f83d134a266.tar.gz qemu-905bdf72a6373bcb46fbdc8b9d7d9f83d134a266.tar.bz2 |
target/mips: Make check_cp0_enabled() return a boolean
To avoid callers to emit dead code if check_cp0_enabled()
raise an exception, let it return a boolean value, whether
CP0 is enabled or not.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210420193453.1913810-4-f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/mips/translate.c | 4 | ||||
-rw-r--r-- | target/mips/translate.h | 7 |
2 files changed, 9 insertions, 2 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 3230b2b..0e90d8c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1572,11 +1572,13 @@ void gen_move_high32(TCGv ret, TCGv_i64 arg) #endif } -void check_cp0_enabled(DisasContext *ctx) +bool check_cp0_enabled(DisasContext *ctx) { if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) { generate_exception_end(ctx, EXCP_CpU); + return false; } + return true; } void check_cp1_enabled(DisasContext *ctx) diff --git a/target/mips/translate.h b/target/mips/translate.h index 2b3c7a6..6144259 100644 --- a/target/mips/translate.h +++ b/target/mips/translate.h @@ -120,7 +120,12 @@ void gen_reserved_instruction(DisasContext *ctx); void check_insn(DisasContext *ctx, uint64_t flags); void check_mips_64(DisasContext *ctx); -void check_cp0_enabled(DisasContext *ctx); +/** + * check_cp0_enabled: + * Return %true if CP0 is enabled, otherwise return %false + * and emit a 'coprocessor unusable' exception. + */ +bool check_cp0_enabled(DisasContext *ctx); void check_cp1_enabled(DisasContext *ctx); void check_cp1_64bitmode(DisasContext *ctx); void check_cp1_registers(DisasContext *ctx, int regs); |