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| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2022-03-02 06:51:37 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:37 +0100 |
| commit | 7b3da08e3c7877643e8b19170bccca88d920d11f (patch) | |
| tree | 4d613c70fef818c5663fc4ac4871f2ce76746f84 /target | |
| parent | eb936dc0746b5543b8a9601d19e33365220f2305 (diff) | |
| download | qemu-7b3da08e3c7877643e8b19170bccca88d920d11f.zip qemu-7b3da08e3c7877643e8b19170bccca88d920d11f.tar.gz qemu-7b3da08e3c7877643e8b19170bccca88d920d11f.tar.bz2 | |
target/ppc: Implement Vector Compare Equal Quadword
Implement the following PowerISA v3.1 instructions:
vcmpequq: Vector Compare Equal Quadword
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-12-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/insn32.decode | 1 | ||||
| -rw-r--r-- | target/ppc/translate/vmx-impl.c.inc | 36 |
2 files changed, 37 insertions, 0 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index be9e05c..437a3e2 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -382,6 +382,7 @@ VCMPEQUB 000100 ..... ..... ..... . 0000000110 @VC VCMPEQUH 000100 ..... ..... ..... . 0001000110 @VC VCMPEQUW 000100 ..... ..... ..... . 0010000110 @VC VCMPEQUD 000100 ..... ..... ..... . 0011000111 @VC +VCMPEQUQ 000100 ..... ..... ..... . 0111000111 @VC VCMPGTSB 000100 ..... ..... ..... . 1100000110 @VC VCMPGTSH 000100 ..... ..... ..... . 1101000110 @VC diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 0574bb8..b7e9afb 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1107,6 +1107,42 @@ TRANS(VCMPNEZB, do_vcmpnez, MO_8) TRANS(VCMPNEZH, do_vcmpnez, MO_16) TRANS(VCMPNEZW, do_vcmpnez, MO_32) +static bool trans_VCMPEQUQ(DisasContext *ctx, arg_VC *a) +{ + TCGv_i64 t0, t1, t2; + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + + get_avr64(t0, a->vra, true); + get_avr64(t1, a->vrb, true); + tcg_gen_xor_i64(t2, t0, t1); + + get_avr64(t0, a->vra, false); + get_avr64(t1, a->vrb, false); + tcg_gen_xor_i64(t1, t0, t1); + + tcg_gen_or_i64(t1, t1, t2); + tcg_gen_setcondi_i64(TCG_COND_EQ, t1, t1, 0); + tcg_gen_neg_i64(t1, t1); + + set_avr64(a->vrt, t1, true); + set_avr64(a->vrt, t1, false); + + if (a->rc) { + tcg_gen_extrl_i64_i32(cpu_crf[6], t1); + tcg_gen_andi_i32(cpu_crf[6], cpu_crf[6], 0xa); + tcg_gen_xori_i32(cpu_crf[6], cpu_crf[6], 0x2); + } + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + + return true; +} + GEN_VXRFORM(vcmpeqfp, 3, 3) GEN_VXRFORM(vcmpgefp, 3, 7) GEN_VXRFORM(vcmpgtfp, 3, 11) |