diff options
author | Taylor Simpson <tsimpson@quicinc.com> | 2022-11-08 08:29:00 -0800 |
---|---|---|
committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-12-16 10:10:28 -0800 |
commit | 40085901dbe339bdcd16ecf1bb70b63a5f119b4f (patch) | |
tree | c98123b2cab680c739daa43541fe489c52a7ffb2 /target | |
parent | fb67c2bf24f4399bb0347580324740409e1bb2d7 (diff) | |
download | qemu-40085901dbe339bdcd16ecf1bb70b63a5f119b4f.zip qemu-40085901dbe339bdcd16ecf1bb70b63a5f119b4f.tar.gz qemu-40085901dbe339bdcd16ecf1bb70b63a5f119b4f.tar.bz2 |
Hexagon (target/hexagon) Remove PC from the runtime state
Add pc field to Packet structure
For helpers that need PC, pass an extra argument
Remove slot arg from conditional jump helpers
On a trap0, copy pkt->pc into hex_gpr[HEX_REG_PC]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221108162906.3166-6-tsimpson@quicinc.com>
Diffstat (limited to 'target')
-rwxr-xr-x | target/hexagon/gen_helper_funcs.py | 4 | ||||
-rwxr-xr-x | target/hexagon/gen_helper_protos.py | 3 | ||||
-rw-r--r-- | target/hexagon/gen_tcg.h | 7 | ||||
-rwxr-xr-x | target/hexagon/gen_tcg_funcs.py | 3 | ||||
-rwxr-xr-x | target/hexagon/hex_common.py | 6 | ||||
-rw-r--r-- | target/hexagon/insn.h | 1 | ||||
-rw-r--r-- | target/hexagon/macros.h | 2 | ||||
-rw-r--r-- | target/hexagon/translate.c | 9 |
8 files changed, 25 insertions, 10 deletions
diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py index c4fc609..024f70d 100755 --- a/target/hexagon/gen_helper_funcs.py +++ b/target/hexagon/gen_helper_funcs.py @@ -241,6 +241,10 @@ def gen_helper_function(f, tag, tagregs, tagimms): if (hex_common.need_pkt_has_multi_cof(tag)): f.write(", uint32_t pkt_has_multi_cof") + if hex_common.need_PC(tag): + if i > 0: f.write(", ") + f.write("target_ulong PC") + i += 1 if hex_common.need_slot(tag): if i > 0: f.write(", ") f.write("uint32_t slot") diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py index 8c6b36d..00c48df 100755 --- a/target/hexagon/gen_helper_protos.py +++ b/target/hexagon/gen_helper_protos.py @@ -85,6 +85,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1 if hex_common.need_part1(tag): def_helper_size += 1 if hex_common.need_slot(tag): def_helper_size += 1 + if hex_common.need_PC(tag): def_helper_size += 1 f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag)) ## The return type is void f.write(', void' ) @@ -93,6 +94,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1 if hex_common.need_part1(tag): def_helper_size += 1 if hex_common.need_slot(tag): def_helper_size += 1 + if hex_common.need_PC(tag): def_helper_size += 1 f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag)) ## Generate the qemu DEF_HELPER type for each result @@ -131,6 +133,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): ## Add the arguments for the instruction pkt_has_multi_cof, slot and ## part1 (if needed) if hex_common.need_pkt_has_multi_cof(tag): f.write(', i32') + if hex_common.need_PC(tag): f.write(', i32') if hex_common.need_slot(tag): f.write(', i32' ) if hex_common.need_part1(tag): f.write(' , i32' ) f.write(')\n') diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index b5fe22a..d38db72 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -750,4 +750,11 @@ RsV = RsV; \ } while (0) +#define fGEN_TCG_J2_trap0(SHORTCODE) \ + do { \ + uiV = uiV; \ + tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt->pc); \ + TCGv excp = tcg_constant_tl(HEX_EXCP_TRAP0); \ + gen_helper_raise_exception(cpu_env, excp); \ + } while (0) #endif diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py index bd199dc..7dbdde3 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -629,6 +629,8 @@ def gen_tcg_func(f, tag, regs, imms): f.write(" TCGv part1 = tcg_constant_tl(insn->part1);\n") if hex_common.need_slot(tag): f.write(" TCGv slot = tcg_constant_tl(insn->slot);\n") + if hex_common.need_PC(tag): + f.write(" TCGv PC = tcg_constant_tl(ctx->pkt->pc);\n") f.write(" gen_helper_%s(" % (tag)) i=0 ## If there is a scalar result, it is the return type @@ -659,6 +661,7 @@ def gen_tcg_func(f, tag, regs, imms): if hex_common.need_pkt_has_multi_cof(tag): f.write(", pkt_has_multi_cof") + if hex_common.need_PC(tag): f.write(", PC") if hex_common.need_slot(tag): f.write(", slot") if hex_common.need_part1(tag): f.write(", part1" ) f.write(");\n") diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index f5b5850..cfe5fe7 100755 --- a/target/hexagon/hex_common.py +++ b/target/hexagon/hex_common.py @@ -194,7 +194,8 @@ def is_new_val(regtype, regid, tag): return regtype+regid+'N' in semdict[tag] def need_slot(tag): - if ('A_CONDEXEC' in attribdict[tag] or + if (('A_CONDEXEC' in attribdict[tag] and + 'A_JUMP' not in attribdict[tag]) or 'A_STORE' in attribdict[tag] or 'A_LOAD' in attribdict[tag]): return 1 @@ -207,6 +208,9 @@ def need_part1(tag): def need_ea(tag): return re.compile(r"\bEA\b").search(semdict[tag]) +def need_PC(tag): + return 'A_IMPLICIT_READS_PC' in attribdict[tag] + def need_pkt_has_multi_cof(tag): return 'A_COF' in attribdict[tag] diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h index 775c4c1..3e7a22c 100644 --- a/target/hexagon/insn.h +++ b/target/hexagon/insn.h @@ -54,6 +54,7 @@ typedef struct Instruction Insn; struct Packet { uint16_t num_insns; uint16_t encod_pkt_size_in_bytes; + uint32_t pc; /* Pre-decodes about COF */ bool pkt_has_cof; /* Has any change-of-flow */ diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index 8fd8123..6e7a6a1 100644 --- a/target/hexagon/macros.h +++ b/target/hexagon/macros.h @@ -398,7 +398,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift) #else #define fREAD_GP() READ_REG(HEX_REG_GP) #endif -#define fREAD_PC() (READ_REG(HEX_REG_PC)) +#define fREAD_PC() (PC) #define fREAD_NPC() (env->next_PC & (0xfffffffe)) diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 1d872d7..9efc6c8 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -194,11 +194,6 @@ static bool check_for_attrib(Packet *pkt, int attrib) return false; } -static bool need_pc(Packet *pkt) -{ - return check_for_attrib(pkt, A_IMPLICIT_READS_PC); -} - static bool need_slot_cancelled(Packet *pkt) { return check_for_attrib(pkt, A_CONDEXEC); @@ -241,9 +236,6 @@ static void gen_start_packet(DisasContext *ctx) } /* Initialize the runtime state for packet semantics */ - if (need_pc(pkt)) { - tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->base.pc_next); - } if (need_slot_cancelled(pkt)) { tcg_gen_movi_tl(hex_slot_cancelled, 0); } @@ -772,6 +764,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx) } if (decode_packet(nwords, words, &pkt, false) > 0) { + pkt.pc = ctx->base.pc_next; HEX_DEBUG_PRINT_PKT(&pkt); ctx->pkt = &pkt; gen_start_packet(ctx); |