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authorYang Weijiang <weijiang.yang@intel.com>2022-05-17 11:50:24 -0400
committerPaolo Bonzini <pbonzini@redhat.com>2022-05-23 10:56:01 +0200
commit3a7a27cffb5ed50840e26a2567e187b17958cc64 (patch)
tree94127bf8f82b392633f0541d31bb88c6d32a6f01 /target
parent3757b0d08b399c609954cf57f273b1167e5d7a8d (diff)
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target/i386: Remove LBREn bit check when access Arch LBR MSRs
Live migration can happen when Arch LBR LBREn bit is cleared, e.g., when migration happens after guest entered SMM mode. In this case, we still need to migrate Arch LBR MSRs. Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> Message-Id: <20220517155024.33270-1-weijiang.yang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/i386/kvm/kvm.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index a9ee8ee..e2d6751 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -3373,15 +3373,14 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
int i, ret;
/*
- * Only migrate Arch LBR states when: 1) Arch LBR is enabled
- * for migrated vcpu. 2) the host Arch LBR depth equals that
- * of source guest's, this is to avoid mismatch of guest/host
- * config for the msr hence avoid unexpected misbehavior.
+ * Only migrate Arch LBR states when the host Arch LBR depth
+ * equals that of source guest's, this is to avoid mismatch
+ * of guest/host config for the msr hence avoid unexpected
+ * misbehavior.
*/
ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
- if (ret == 1 && (env->msr_lbr_ctl & 0x1) && !!depth &&
- depth == env->msr_lbr_depth) {
+ if (ret == 1 && !!depth && depth == env->msr_lbr_depth) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, env->msr_lbr_ctl);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, env->msr_lbr_depth);
@@ -3801,13 +3800,11 @@ static int kvm_get_msrs(X86CPU *cpu)
if (kvm_enabled() && cpu->enable_pmu &&
(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
- uint64_t ctl, depth;
- int i, ret2;
+ uint64_t depth;
+ int i, ret;
- ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_CTL, &ctl);
- ret2 = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
- if (ret == 1 && ret2 == 1 && (ctl & 0x1) &&
- depth == ARCH_LBR_NR_ENTRIES) {
+ ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
+ if (ret == 1 && depth == ARCH_LBR_NR_ENTRIES) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, 0);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, 0);