aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorMichael Clark <mjc@sifive.com>2018-03-03 01:32:59 +1300
committerMichael Clark <mjc@sifive.com>2018-03-07 08:30:28 +1300
commit25fa194b7b11901561532e435beb83d046899f7a (patch)
tree361c143f38183b884bcac16e30d69791c3c40492 /target
parenta7240d1e4aac4cd4542d68f3cc722939550da6af (diff)
downloadqemu-25fa194b7b11901561532e435beb83d046899f7a.zip
qemu-25fa194b7b11901561532e435beb83d046899f7a.tar.gz
qemu-25fa194b7b11901561532e435beb83d046899f7a.tar.bz2
RISC-V Build Infrastructure
This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh' script is updated to add the RISC-V ELF magic. Expected checkpatch errors for consistency reasons: ERROR: line over 90 characters FILE: scripts/qemu-binfmt-conf.sh Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/Makefile.objs1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs
new file mode 100644
index 0000000..abd0a7c
--- /dev/null
+++ b/target/riscv/Makefile.objs
@@ -0,0 +1 @@
+obj-y += translate.o op_helper.o helper.o cpu.o fpu_helper.o gdbstub.o pmp.o