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authorRichard Henderson <richard.henderson@linaro.org>2018-10-08 14:22:00 -0700
committerPeter Maydell <peter.maydell@linaro.org>2018-10-16 16:16:42 +0100
commit37bdda89eb7615cb225f781c9fb552e144c68ea7 (patch)
treee681cfc82d4f3399e8994426dc1ace9b390cd1be /target
parentaaab8f3400ea5ec9c6cce3607ff26f9be89321d6 (diff)
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target/arm: Fix cortex-a7 id_isar0
The incorrect value advertised only thumb2 div without arm div. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181008212205.17752-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/cpu.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 7ea7e4c..cd48ad4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1587,7 +1587,10 @@ static void cortex_a7_initfn(Object *obj)
cpu->id_mmfr1 = 0x40000000;
cpu->id_mmfr2 = 0x01240000;
cpu->id_mmfr3 = 0x02102211;
- cpu->id_isar0 = 0x01101110;
+ /* a7_mpcore_r0p5_trm, page 4-4 gives 0x01101110; but
+ * table 4-41 gives 0x02101110, which includes the arm div insns.
+ */
+ cpu->id_isar0 = 0x02101110;
cpu->id_isar1 = 0x13112111;
cpu->id_isar2 = 0x21232041;
cpu->id_isar3 = 0x11112131;