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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-02-14 17:51:02 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-21 16:07:01 +0000 |
| commit | d52c061e541982a3663ad5c65bd3b518dbe85b87 (patch) | |
| tree | 1bb47af40b616b3d297b629d1faf55ede701437f /target | |
| parent | ceb2744b47a1ef4184dca56a158eb3156b6eba36 (diff) | |
| download | qemu-d52c061e541982a3663ad5c65bd3b518dbe85b87.zip qemu-d52c061e541982a3663ad5c65bd3b518dbe85b87.tar.gz qemu-d52c061e541982a3663ad5c65bd3b518dbe85b87.tar.bz2 | |
target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field
We already define FIELD macros for ID_DFR0, so use them in the
one place where we're doing direct bit value manipulation.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200214175116.9164-8-peter.maydell@linaro.org
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 12bf968..1024f50 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1719,7 +1719,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) #endif } else { cpu->id_aa64dfr0 = FIELD_DP64(cpu->id_aa64dfr0, ID_AA64DFR0, PMUVER, 0); - cpu->id_dfr0 &= ~(0xf << 24); + cpu->id_dfr0 = FIELD_DP32(cpu->id_dfr0, ID_DFR0, PERFMON, 0); cpu->pmceid0 = 0; cpu->pmceid1 = 0; } |