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author | Richard Henderson <richard.henderson@linaro.org> | 2020-02-07 14:04:25 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-07 14:04:25 +0000 |
commit | b4ecf60f7eee88cbfe5700044790cb7494c5dd37 (patch) | |
tree | c55aaea7b4bfc9c515beed0168d62776401777ff /target | |
parent | 5bc8437136fb1e7bc8b566f4f2f7269b0f990fad (diff) | |
download | qemu-b4ecf60f7eee88cbfe5700044790cb7494c5dd37.zip qemu-b4ecf60f7eee88cbfe5700044790cb7494c5dd37.tar.gz qemu-b4ecf60f7eee88cbfe5700044790cb7494c5dd37.tar.bz2 |
target/arm: Update define_one_arm_cp_reg_with_opaque for VHE
For ARMv8.1, op1 == 5 is reserved for EL2 aliases of
EL1 and EL0 registers.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200206105448.4726-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/helper.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 992ab2a..2aa04d0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7586,13 +7586,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, mask = PL0_RW; break; case 4: + case 5: /* min_EL EL2 */ mask = PL2_RW; break; - case 5: - /* unallocated encoding, so not possible */ - assert(false); - break; case 6: /* min_EL EL3 */ mask = PL3_RW; |