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| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2022-03-02 06:51:37 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:37 +0100 |
| commit | 95f1ee288be9437677a85dcf03fa67b6379c23e6 (patch) | |
| tree | 9ccf21167db8f874f77c04915ded739b464b655e /target | |
| parent | fb1b56752fb5e043aef98d62abbd28c036440b07 (diff) | |
| download | qemu-95f1ee288be9437677a85dcf03fa67b6379c23e6.zip qemu-95f1ee288be9437677a85dcf03fa67b6379c23e6.tar.gz qemu-95f1ee288be9437677a85dcf03fa67b6379c23e6.tar.bz2 | |
target/ppc: implement vcntmb[bhwd]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-18-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/insn32.decode | 8 | ||||
| -rw-r--r-- | target/ppc/translate/vmx-impl.c.inc | 32 |
2 files changed, 40 insertions, 0 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index b20f1ea..31a3c3b 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -63,6 +63,9 @@ &VX_bf bf vra vrb @VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf +&VX_mp rt mp:bool vrb +@VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp + &VX_tb_rc vrt vrb rc:bool @VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc @@ -489,6 +492,11 @@ VEXTRACTWM 000100 ..... 01010 ..... 11001000010 @VX_tb VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb +VCNTMBB 000100 ..... 1100 . ..... 11001000010 @VX_mp +VCNTMBH 000100 ..... 1101 . ..... 11001000010 @VX_mp +VCNTMBW 000100 ..... 1110 . ..... 11001000010 @VX_mp +VCNTMBD 000100 ..... 1111 . ..... 11001000010 @VX_mp + ## Vector Multiply Instruction VMULESB 000100 ..... ..... ..... 01100001000 @VX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 4db5656..e45bd19 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1910,6 +1910,38 @@ static bool trans_MTVSRBMI(DisasContext *ctx, arg_DX_b *a) return true; } +static bool do_vcntmb(DisasContext *ctx, arg_VX_mp *a, int vece) +{ + TCGv_i64 rt, vrb, mask; + rt = tcg_const_i64(0); + vrb = tcg_temp_new_i64(); + mask = tcg_constant_i64(dup_const(vece, 1ULL << ((8 << vece) - 1))); + + for (int i = 0; i < 2; i++) { + get_avr64(vrb, a->vrb, i); + if (a->mp) { + tcg_gen_and_i64(vrb, mask, vrb); + } else { + tcg_gen_andc_i64(vrb, mask, vrb); + } + tcg_gen_ctpop_i64(vrb, vrb); + tcg_gen_add_i64(rt, rt, vrb); + } + + tcg_gen_shli_i64(rt, rt, TARGET_LONG_BITS - 8 + vece); + tcg_gen_trunc_i64_tl(cpu_gpr[a->rt], rt); + + tcg_temp_free_i64(vrb); + tcg_temp_free_i64(rt); + + return true; +} + +TRANS(VCNTMBB, do_vcntmb, MO_8) +TRANS(VCNTMBH, do_vcntmb, MO_16) +TRANS(VCNTMBW, do_vcntmb, MO_32) +TRANS(VCNTMBD, do_vcntmb, MO_64) + static bool do_vstri(DisasContext *ctx, arg_VX_tb_rc *a, void (*gen_helper)(TCGv_i32, TCGv_ptr, TCGv_ptr)) { |