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authorWeiwei Li <liweiwei@iscas.ac.cn>2023-05-10 11:00:40 +0800
committerAlistair Francis <alistair.francis@wdc.com>2023-06-13 16:40:02 +1000
commit6672e29d3bc8e1a855a9ee8209c7315b8bc94d19 (patch)
tree81bb982d49e3d8e00d8ee97521a7294d9f7e55f3 /target
parentbc0ec52eb258e55aa8a4a4ab89cb5c8ad49b30ee (diff)
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target/riscv: Move zc* out of the experimental properties
Zc* extensions (version 1.0) are ratified. Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <20230510030040.20528-1-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/cpu.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index db0875f..99ed9cb 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1571,6 +1571,14 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("zmmul", RISCVCPU, cfg.ext_zmmul, false),
+ DEFINE_PROP_BOOL("zca", RISCVCPU, cfg.ext_zca, false),
+ DEFINE_PROP_BOOL("zcb", RISCVCPU, cfg.ext_zcb, false),
+ DEFINE_PROP_BOOL("zcd", RISCVCPU, cfg.ext_zcd, false),
+ DEFINE_PROP_BOOL("zce", RISCVCPU, cfg.ext_zce, false),
+ DEFINE_PROP_BOOL("zcf", RISCVCPU, cfg.ext_zcf, false),
+ DEFINE_PROP_BOOL("zcmp", RISCVCPU, cfg.ext_zcmp, false),
+ DEFINE_PROP_BOOL("zcmt", RISCVCPU, cfg.ext_zcmt, false),
+
/* Vendor-specific custom extensions */
DEFINE_PROP_BOOL("xtheadba", RISCVCPU, cfg.ext_xtheadba, false),
DEFINE_PROP_BOOL("xtheadbb", RISCVCPU, cfg.ext_xtheadbb, false),
@@ -1588,14 +1596,6 @@ static Property riscv_cpu_extensions[] = {
/* These are experimental so mark with 'x-' */
DEFINE_PROP_BOOL("x-zicond", RISCVCPU, cfg.ext_zicond, false),
- DEFINE_PROP_BOOL("x-zca", RISCVCPU, cfg.ext_zca, false),
- DEFINE_PROP_BOOL("x-zcb", RISCVCPU, cfg.ext_zcb, false),
- DEFINE_PROP_BOOL("x-zcd", RISCVCPU, cfg.ext_zcd, false),
- DEFINE_PROP_BOOL("x-zce", RISCVCPU, cfg.ext_zce, false),
- DEFINE_PROP_BOOL("x-zcf", RISCVCPU, cfg.ext_zcf, false),
- DEFINE_PROP_BOOL("x-zcmp", RISCVCPU, cfg.ext_zcmp, false),
- DEFINE_PROP_BOOL("x-zcmt", RISCVCPU, cfg.ext_zcmt, false),
-
/* ePMP 0.9.3 */
DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false),
DEFINE_PROP_BOOL("x-smaia", RISCVCPU, cfg.ext_smaia, false),