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authorRichard Henderson <richard.henderson@linaro.org>2023-08-05 00:31:29 +0000
committerRichard Henderson <richard.henderson@linaro.org>2023-08-24 11:22:42 -0700
commite3ebbade58aae114c0d61a7365ea54b36f07f2fb (patch)
tree19748a3cf16c9f2d03069a38c9596b7086ea278e /target/sparc
parent253d110dba77769e1f2919d066c53dfd65942dc3 (diff)
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target/sparc: Use tcg_gen_movcond_i64 in gen_edge
The setcond + neg + or sequence is a complex method of performing a conditional move. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc')
-rw-r--r--target/sparc/translate.c17
1 files changed, 4 insertions, 13 deletions
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index bd877a5..fa80a91 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2916,7 +2916,7 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2,
tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1);
tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2);
- tcg_gen_andi_tl(dst, lo1, omask);
+ tcg_gen_andi_tl(lo1, lo1, omask);
tcg_gen_andi_tl(lo2, lo2, omask);
amask = -8;
@@ -2926,18 +2926,9 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2,
tcg_gen_andi_tl(s1, s1, amask);
tcg_gen_andi_tl(s2, s2, amask);
- /* We want to compute
- dst = (s1 == s2 ? lo1 : lo1 & lo2).
- We've already done dst = lo1, so this reduces to
- dst &= (s1 == s2 ? -1 : lo2)
- Which we perform by
- lo2 |= -(s1 == s2)
- dst &= lo2
- */
- tcg_gen_setcond_tl(TCG_COND_EQ, lo1, s1, s2);
- tcg_gen_neg_tl(lo1, lo1);
- tcg_gen_or_tl(lo2, lo2, lo1);
- tcg_gen_and_tl(dst, dst, lo2);
+ /* Compute dst = (s1 == s2 ? lo1 : lo1 & lo2). */
+ tcg_gen_and_tl(lo2, lo2, lo1);
+ tcg_gen_movcond_tl(TCG_COND_EQ, dst, s1, s2, lo1, lo2);
}
static void gen_alignaddr(TCGv dst, TCGv s1, TCGv s2, bool left)