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| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-01 23:20:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-13 11:17:29 +0200 |
| commit | 39682608111713404b53ade46edc87a7f85a0f12 (patch) | |
| tree | 04d47fd8674a5ddd4d307173334438295cfaf19d /target/sh4/cpu.h | |
| parent | a6215749dc299214642b3dfd690227243606331f (diff) | |
| download | qemu-39682608111713404b53ade46edc87a7f85a0f12.zip qemu-39682608111713404b53ade46edc87a7f85a0f12.tar.gz qemu-39682608111713404b53ade46edc87a7f85a0f12.tar.bz2 | |
target/sh4: get rid of DELAY_SLOT_CLEARME
Now that ctx->flags has been split, it becomes clear that
DELAY_SLOT_CLEARME has not impact on the code generation: in both case
ctx->envflags is cleared, either by clearing all the flags, or by
setting it to 0. This is left-over from pre-TCG era.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/cpu.h')
| -rw-r--r-- | target/sh4/cpu.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index cad8989..9445cc7 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -93,7 +93,6 @@ #define DELAY_SLOT (1 << 0) #define DELAY_SLOT_CONDITIONAL (1 << 1) #define DELAY_SLOT_TRUE (1 << 2) -#define DELAY_SLOT_CLEARME (1 << 3) /* The dynamic value of the DELAY_SLOT_TRUE flag determines whether the jump * after the delay slot should be taken or not. It is calculated from SR_T. * @@ -384,7 +383,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, *pc = env->pc; *cs_base = 0; *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL - | DELAY_SLOT_TRUE | DELAY_SLOT_CLEARME)) /* Bits 0- 3 */ + | DELAY_SLOT_TRUE)) /* Bits 0- 2 */ | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */ | (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */ | (env->sr & (1u << SR_FD)) /* Bit 15 */ |