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authorAurelien Jarno <aurelien@aurel32.net>2017-05-01 23:20:43 +0200
committerAurelien Jarno <aurelien@aurel32.net>2017-05-13 11:18:27 +0200
commit34257c2117209573ddff290128d4192cf9bbdf23 (patch)
tree6593fbf774d66c1d37dace6efe0e7bf00dfe47a4 /target/sh4/cpu.c
parent143021b26ffe1a468236c824003caaf4fd7d4831 (diff)
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target/sh4: trap unaligned accesses
SH4 requires that memory accesses are naturally aligned, except for the SH4-A movua.l instructions which can do unaligned loads. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/cpu.c')
-rw-r--r--target/sh4/cpu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 9a481c3..9da7e1e 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -301,6 +301,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = superh_cpu_handle_mmu_fault;
#else
+ cc->do_unaligned_access = superh_cpu_do_unaligned_access;
cc->get_phys_page_debug = superh_cpu_get_phys_page_debug;
#endif
cc->disas_set_info = superh_cpu_disas_set_info;