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authorIlya Leoshkevich <iii@linux.ibm.com>2023-07-24 10:15:57 +0200
committerThomas Huth <thuth@redhat.com>2023-07-24 18:44:47 +0200
commita2025557ed4d8d5e6a4d0dd681717c390f51f5be (patch)
tree254ca1b38fd50848cd60d026115ed526a461f269 /target/s390x
parent53684e344a27da770acc9012740334154ddea24f (diff)
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target/s390x: Fix ICM with M3=0
When the mask is zero, access exceptions should still be recognized for 1 byte at the second-operand address. CC should be set to 0. Cc: qemu-stable@nongnu.org Fixes: e023e832d0ac ("s390x: translate engine for s390x CPU") Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230724082032.66864-5-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target/s390x')
-rw-r--r--target/s390x/tcg/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index d6e8ace..244e61a 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2515,6 +2515,12 @@ static DisasJumpType op_icm(DisasContext *s, DisasOps *o)
ccm = ((1ull << len) - 1) << pos;
break;
+ case 0:
+ /* Recognize access exceptions for the first byte. */
+ tcg_gen_qemu_ld_i64(tmp, o->in2, get_mem_index(s), MO_UB);
+ gen_op_movi_cc(s, 0);
+ return DISAS_NEXT;
+
default:
/* This is going to be a sequence of loads and inserts. */
pos = base + 32 - 8;