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authorDavid Hildenbrand <david@redhat.com>2017-06-09 15:34:26 +0200
committerRichard Henderson <rth@twiddle.net>2017-06-13 11:09:39 -0700
commit076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0 (patch)
tree83b357618c62624cc4baf42094e8c50129b674b7 /target/s390x/translate.c
parentbecf8217deb2afc347d5172d9f30c8a8964b8b27 (diff)
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s390x/cpumodel: wire up cpu type + id for TCG
Let's properly expose the CPU type (machine-type number) via "STORE CPU ID" and "STORE SUBSYSTEM INFORMATION". As TCG emulates basic mode, the CPU identification number has the format "Annnnn", whereby A is the CPU address, and n are parts of the CPU serial number (0 for us for now). A specification exception will be injected if the address is not aligned to a double word. Low address protection will not be checked as we're missing some more general support for that. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609133426.11447-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r--target/s390x/translate.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index d2917e4..8c055b7 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3876,14 +3876,9 @@ static ExitStatus op_stctl(DisasContext *s, DisasOps *o)
static ExitStatus op_stidp(DisasContext *s, DisasOps *o)
{
- TCGv_i64 t1 = tcg_temp_new_i64();
-
check_privileged(s);
- tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, cpu_num));
- tcg_gen_ld32u_i64(t1, cpu_env, offsetof(CPUS390XState, machine_type));
- tcg_gen_deposit_i64(o->out, o->out, t1, 32, 32);
- tcg_temp_free_i64(t1);
-
+ tcg_gen_ld_i64(o->out, cpu_env, offsetof(CPUS390XState, cpuid));
+ tcg_gen_qemu_st_i64(o->out, o->addr1, get_mem_index(s), MO_TEQ | MO_ALIGN);
return NO_EXIT;
}