aboutsummaryrefslogtreecommitdiff
path: root/target/s390x/helper.h
diff options
context:
space:
mode:
authorDavid Hildenbrand <david@redhat.com>2021-03-15 09:54:49 +0100
committerCornelia Huck <cohuck@redhat.com>2021-03-15 11:03:20 +0100
commit1a3c443c43e81e32a05d6995039e0f356b8f60cb (patch)
tree6e97af58abd6d11cc951f88fbd22432d0009d406 /target/s390x/helper.h
parente56552cf0771a7f60ae4c1bc186d43a585022849 (diff)
downloadqemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.zip
qemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.tar.gz
qemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.tar.bz2
target/s390x: Store r1/r2 for page-translation exceptions during MVPG
The PoP states: When EDAT-1 does not apply, and a program interruption due to a page-translation exception is recognized by the MOVE PAGE instruction, the contents of the R1 field of the instruction are stored in bit positions 0-3 of location 162, and the contents of the R2 field are stored in bit positions 4-7. If [...] an ASCE-type, region-first-translation, region-second-translation, region-third-translation, or segment-translation exception was recognized, the contents of location 162 are unpredictable. So we have to write r1/r2 into the lowcore on page-translation exceptions. Simply handle all exceptions inside our mvpg helper now. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210315085449.34676-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target/s390x/helper.h')
-rw-r--r--target/s390x/helper.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 55bd155..d4e4f33 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -18,7 +18,7 @@ DEF_HELPER_3(srstu, void, env, i32, i32)
DEF_HELPER_4(clst, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(mvn, TCG_CALL_NO_WG, void, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(mvo, TCG_CALL_NO_WG, void, env, i32, i64, i64)
-DEF_HELPER_FLAGS_4(mvpg, TCG_CALL_NO_WG, i32, env, i64, i64, i64)
+DEF_HELPER_FLAGS_4(mvpg, TCG_CALL_NO_WG, i32, env, i64, i32, i32)
DEF_HELPER_FLAGS_4(mvz, TCG_CALL_NO_WG, void, env, i32, i64, i64)
DEF_HELPER_3(mvst, i32, env, i32, i32)
DEF_HELPER_4(ex, void, env, i32, i64, i64)