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author | Cho, Yu-Chen <acho@suse.com> | 2021-07-07 18:53:19 +0800 |
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committer | Cornelia Huck <cohuck@redhat.com> | 2021-07-07 14:01:58 +0200 |
commit | 98be64d2f4dd5ff66b16e3525ee7d099d82f5ec8 (patch) | |
tree | 8c9934bcc0ad39baf9a5d3f628f94564c8c7795e /target/s390x/helper.c | |
parent | 72ffb6310baab625958fa39155d98cce6a3bb235 (diff) | |
download | qemu-98be64d2f4dd5ff66b16e3525ee7d099d82f5ec8.zip qemu-98be64d2f4dd5ff66b16e3525ee7d099d82f5ec8.tar.gz qemu-98be64d2f4dd5ff66b16e3525ee7d099d82f5ec8.tar.bz2 |
target/s390x: split cpu-dump from helper.c
Splitting this functionality also allows us to make helper.c sysemu-only.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Cho, Yu-Chen <acho@suse.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210707105324.23400-10-acho@suse.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target/s390x/helper.c')
-rw-r--r-- | target/s390x/helper.c | 151 |
1 files changed, 0 insertions, 151 deletions
diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 8015c4e..c72e990 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -23,7 +23,6 @@ #include "s390x-internal.h" #include "exec/gdbstub.h" #include "qemu/timer.h" -#include "qemu/qemu-print.h" #include "hw/s390x/ioinst.h" #include "hw/s390x/pv.h" #include "sysemu/hw_accel.h" @@ -289,153 +288,3 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) /* For user-only, tcg is always enabled. */ #define tcg_enabled() true #endif /* CONFIG_USER_ONLY */ - -void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) -{ -#ifndef CONFIG_USER_ONLY - uint64_t old_mask = env->psw.mask; -#endif - - env->psw.addr = addr; - env->psw.mask = mask; - - /* KVM will handle all WAITs and trigger a WAIT exit on disabled_wait */ - if (!tcg_enabled()) { - return; - } - env->cc_op = (mask >> 44) & 3; - -#ifndef CONFIG_USER_ONLY - if ((old_mask ^ mask) & PSW_MASK_PER) { - s390_cpu_recompute_watchpoints(env_cpu(env)); - } - - if (mask & PSW_MASK_WAIT) { - s390_handle_wait(env_archcpu(env)); - } -#endif -} - -uint64_t s390_cpu_get_psw_mask(CPUS390XState *env) -{ - uint64_t r = env->psw.mask; - - if (tcg_enabled()) { - uint64_t cc = calc_cc(env, env->cc_op, env->cc_src, - env->cc_dst, env->cc_vr); - - assert(cc <= 3); - r &= ~PSW_MASK_CC; - r |= cc << 44; - } - - return r; -} - -void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags) -{ - S390CPU *cpu = S390_CPU(cs); - CPUS390XState *env = &cpu->env; - int i; - - qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64, - s390_cpu_get_psw_mask(env), env->psw.addr); - if (!tcg_enabled()) { - qemu_fprintf(f, "\n"); - } else if (env->cc_op > 3) { - qemu_fprintf(f, " cc %15s\n", cc_name(env->cc_op)); - } else { - qemu_fprintf(f, " cc %02x\n", env->cc_op); - } - - for (i = 0; i < 16; i++) { - qemu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]); - if ((i % 4) == 3) { - qemu_fprintf(f, "\n"); - } else { - qemu_fprintf(f, " "); - } - } - - if (flags & CPU_DUMP_FPU) { - if (s390_has_feat(S390_FEAT_VECTOR)) { - for (i = 0; i < 32; i++) { - qemu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c", - i, env->vregs[i][0], env->vregs[i][1], - i % 2 ? '\n' : ' '); - } - } else { - for (i = 0; i < 16; i++) { - qemu_fprintf(f, "F%02d=%016" PRIx64 "%c", - i, *get_freg(env, i), - (i % 4) == 3 ? '\n' : ' '); - } - } - } - -#ifndef CONFIG_USER_ONLY - for (i = 0; i < 16; i++) { - qemu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]); - if ((i % 4) == 3) { - qemu_fprintf(f, "\n"); - } else { - qemu_fprintf(f, " "); - } - } -#endif - -#ifdef DEBUG_INLINE_BRANCHES - for (i = 0; i < CC_OP_MAX; i++) { - qemu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i), - inline_branch_miss[i], inline_branch_hit[i]); - } -#endif - - qemu_fprintf(f, "\n"); -} - -const char *cc_name(enum cc_op cc_op) -{ - static const char * const cc_names[] = { - [CC_OP_CONST0] = "CC_OP_CONST0", - [CC_OP_CONST1] = "CC_OP_CONST1", - [CC_OP_CONST2] = "CC_OP_CONST2", - [CC_OP_CONST3] = "CC_OP_CONST3", - [CC_OP_DYNAMIC] = "CC_OP_DYNAMIC", - [CC_OP_STATIC] = "CC_OP_STATIC", - [CC_OP_NZ] = "CC_OP_NZ", - [CC_OP_ADDU] = "CC_OP_ADDU", - [CC_OP_SUBU] = "CC_OP_SUBU", - [CC_OP_LTGT_32] = "CC_OP_LTGT_32", - [CC_OP_LTGT_64] = "CC_OP_LTGT_64", - [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32", - [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64", - [CC_OP_LTGT0_32] = "CC_OP_LTGT0_32", - [CC_OP_LTGT0_64] = "CC_OP_LTGT0_64", - [CC_OP_ADD_64] = "CC_OP_ADD_64", - [CC_OP_SUB_64] = "CC_OP_SUB_64", - [CC_OP_ABS_64] = "CC_OP_ABS_64", - [CC_OP_NABS_64] = "CC_OP_NABS_64", - [CC_OP_ADD_32] = "CC_OP_ADD_32", - [CC_OP_SUB_32] = "CC_OP_SUB_32", - [CC_OP_ABS_32] = "CC_OP_ABS_32", - [CC_OP_NABS_32] = "CC_OP_NABS_32", - [CC_OP_COMP_32] = "CC_OP_COMP_32", - [CC_OP_COMP_64] = "CC_OP_COMP_64", - [CC_OP_TM_32] = "CC_OP_TM_32", - [CC_OP_TM_64] = "CC_OP_TM_64", - [CC_OP_NZ_F32] = "CC_OP_NZ_F32", - [CC_OP_NZ_F64] = "CC_OP_NZ_F64", - [CC_OP_NZ_F128] = "CC_OP_NZ_F128", - [CC_OP_ICM] = "CC_OP_ICM", - [CC_OP_SLA_32] = "CC_OP_SLA_32", - [CC_OP_SLA_64] = "CC_OP_SLA_64", - [CC_OP_FLOGR] = "CC_OP_FLOGR", - [CC_OP_LCBB] = "CC_OP_LCBB", - [CC_OP_VC] = "CC_OP_VC", - [CC_OP_MULS_32] = "CC_OP_MULS_32", - [CC_OP_MULS_64] = "CC_OP_MULS_64", - }; - - return cc_names[cc_op]; -} |