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authorRichard Henderson <richard.henderson@linaro.org>2022-08-11 13:48:03 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-09-06 08:04:26 +0100
commit306c872103b4d0986c9f671eb7538b0b70bf69b5 (patch)
tree17360b109ccbc2357188396e082ed033cd13ef9e /target/rx
parentdac8d19bdb3ccaafbcbd2df34135464964232a8f (diff)
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accel/tcg: Add pc and host_pc params to gen_intermediate_code
Pass these along to translator_loop -- pc may be used instead of tb->pc, and host_pc is currently unused. Adjust all targets at one time. Acked-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Tested-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/rx')
-rw-r--r--target/rx/translate.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/rx/translate.c b/target/rx/translate.c
index 62aee66..ea5653b 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -2363,11 +2363,12 @@ static const TranslatorOps rx_tr_ops = {
.disas_log = rx_tr_disas_log,
};
-void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
+void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
+ target_ulong pc, void *host_pc)
{
DisasContext dc;
- translator_loop(&rx_tr_ops, &dc.base, cs, tb, max_insns);
+ translator_loop(cs, tb, max_insns, pc, host_pc, &rx_tr_ops, &dc.base);
}
void restore_state_to_opc(CPURXState *env, TranslationBlock *tb,