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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2023-09-26 15:31:08 -0300
committerAlistair Francis <alistair.francis@wdc.com>2023-10-12 12:30:16 +1000
commitb933720be22442e6847629fe0dcf24b95cef3d56 (patch)
treef4365c3b9707e3584de9c03ba79ab7164c9da0b9 /target/riscv
parent31778448f2c39565062014ae89ca8c2f82522fe5 (diff)
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target/riscv: add riscv_cpu_get_name()
We'll introduce generic errors that will output a CPU type name via its RISCVCPU pointer. Create a helper for that. Use the helper in tcg_cpu_realizefn() instead of hardcoding the 'host' CPU name. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230926183109.165878-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/cpu.c11
-rw-r--r--target/riscv/cpu.h1
-rw-r--r--target/riscv/tcg/tcg-cpu.c4
3 files changed, 15 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a7cc7aa..cdeb24c 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -643,6 +643,17 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
return oc;
}
+char *riscv_cpu_get_name(RISCVCPU *cpu)
+{
+ RISCVCPUClass *rcc = RISCV_CPU_GET_CLASS(cpu);
+ const char *typename = object_class_get_name(OBJECT_CLASS(rcc));
+
+ g_assert(g_str_has_suffix(typename, RISCV_CPU_TYPE_SUFFIX));
+
+ return g_strndup(typename,
+ strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX));
+}
+
static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
RISCVCPU *cpu = RISCV_CPU(cs);
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 7291b84..8298f8b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -730,6 +730,7 @@ typedef struct isa_ext_data {
int ext_enable_offset;
} RISCVIsaExtData;
extern const RISCVIsaExtData isa_edata_arr[];
+char *riscv_cpu_get_name(RISCVCPU *cpu);
void riscv_add_satp_mode_properties(Object *obj);
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index a021ec8..104e918 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -563,7 +563,9 @@ static bool tcg_cpu_realize(CPUState *cs, Error **errp)
Error *local_err = NULL;
if (object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
- error_setg(errp, "'host' CPU is not compatible with TCG acceleration");
+ g_autofree char *name = riscv_cpu_get_name(cpu);
+ error_setg(errp, "'%s' CPU is not compatible with TCG acceleration",
+ name);
return false;
}