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author | Frank Chang <frank.chang@sifive.com> | 2021-12-10 15:56:41 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:53:31 +1000 |
commit | 74eb7834bc7b2033d8caa308320afacbaff0525f (patch) | |
tree | 0b440625be044affe9d6d4daa94657e6f177547e /target/riscv | |
parent | b8dd99f2d10311e0f4527507f56a1721e9c19505 (diff) | |
download | qemu-74eb7834bc7b2033d8caa308320afacbaff0525f.zip qemu-74eb7834bc7b2033d8caa308320afacbaff0525f.tar.gz qemu-74eb7834bc7b2033d8caa308320afacbaff0525f.tar.bz2 |
target/riscv: rvv-1.0: single-width scaling shift instructions
log(SEW) truncate vssra.vi immediate value.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211210075704.23951-56-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r-- | target/riscv/insn_trans/trans_rvv.c.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index b43234e..03716ad 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2030,8 +2030,8 @@ GEN_OPIVV_TRANS(vssrl_vv, opivv_check) GEN_OPIVV_TRANS(vssra_vv, opivv_check) GEN_OPIVX_TRANS(vssrl_vx, opivx_check) GEN_OPIVX_TRANS(vssra_vx, opivx_check) -GEN_OPIVI_TRANS(vssrl_vi, IMM_ZX, vssrl_vx, opivx_check) -GEN_OPIVI_TRANS(vssra_vi, IMM_SX, vssra_vx, opivx_check) +GEN_OPIVI_TRANS(vssrl_vi, IMM_TRUNC_SEW, vssrl_vx, opivx_check) +GEN_OPIVI_TRANS(vssra_vi, IMM_TRUNC_SEW, vssra_vx, opivx_check) /* Vector Narrowing Fixed-Point Clip Instructions */ GEN_OPIWV_NARROW_TRANS(vnclipu_wv) |