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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-05-15 11:56:08 +0900 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-05-24 10:38:50 +1000 |
| commit | 1d398ab9dcfb8f5fb4b9a285ea3167f7ba85976d (patch) | |
| tree | 87d2f4f85896b3040c4d924cf8d20931f6aa3990 /target/riscv | |
| parent | 61cdf4593e4e1bf10cb58a5b8939414f4cd50834 (diff) | |
| download | qemu-1d398ab9dcfb8f5fb4b9a285ea3167f7ba85976d.zip qemu-1d398ab9dcfb8f5fb4b9a285ea3167f7ba85976d.tar.gz qemu-1d398ab9dcfb8f5fb4b9a285ea3167f7ba85976d.tar.bz2 | |
target/riscv: Disable "G" by default
Because "G" virtual extension expands to "IMAFD", we cannot separately
disable extensions like "F" or "D" without disabling "G". Because all
"IMAFD" are enabled by default, it's harmless to disable "G" by default.
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <cab7205f1d7668f642fa242386543334af6bc1bd.1652583332.git.research_trasio@irq.a4lg.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e439716..1fb76b4 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -812,7 +812,7 @@ static Property riscv_cpu_properties[] = { /* Defaults for standard extensions */ DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true), DEFINE_PROP_BOOL("e", RISCVCPU, cfg.ext_e, false), - DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, true), + DEFINE_PROP_BOOL("g", RISCVCPU, cfg.ext_g, false), DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true), DEFINE_PROP_BOOL("a", RISCVCPU, cfg.ext_a, true), DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true), |