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| author | Rob Bradford <rbradford@rivosinc.com> | 2023-10-31 15:37:13 +0000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-11-07 11:06:02 +1000 |
| commit | 755b41d09f516109f5ddc49aae86358c72e656d5 (patch) | |
| tree | 55b0c8b135651241bd9058d4544eea89a0530638 /target/riscv/pmu.h | |
| parent | c541b07de79daa293e9ccc07f3c98f575ad09f2a (diff) | |
| download | qemu-755b41d09f516109f5ddc49aae86358c72e656d5.zip qemu-755b41d09f516109f5ddc49aae86358c72e656d5.tar.gz qemu-755b41d09f516109f5ddc49aae86358c72e656d5.tar.bz2 | |
target/riscv: Propagate error from PMU setup
More closely follow the QEMU style by returning an Error and propagating
it there is an error relating to the PMU setup.
Further simplify the function by removing the num_counters parameter as
this is available from the passed in cpu pointer.
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Message-ID: <20231031154000.18134-2-rbradford@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/pmu.h')
| -rw-r--r-- | target/riscv/pmu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 2bfb71b..88e0713 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -17,13 +17,14 @@ */ #include "cpu.h" +#include "qapi/error.h" bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env, uint32_t target_ctr); bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env, uint32_t target_ctr); void riscv_pmu_timer_cb(void *priv); -int riscv_pmu_init(RISCVCPU *cpu, int num_counters); +void riscv_pmu_init(RISCVCPU *cpu, Error **errp); int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value, uint32_t ctr_idx); int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); |